Interval; I/O Event; Fas216 Requests; Epak Requests (-Epirq) - Performance Computer PT-VME161 User Manual

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Section FUNCTIONAL DESCRIPTION
42 Extensible Single Board Computer/Controller User's Manual

Interval

The latched outputs of the individual Interval Timers may be cleared by writing the
appropriate bit combinations to the RITI field of System Control Register 2.
Interrupts from the three Interval Timers can be disabled by clearing the EITI bit (5)
in System Control Register 2. See the section "Interval Timer" on page 32.

I/O Event

This input to the SCV64 is the logical OR of the Fast SCSI Processor Chip (FAS216) Inter-
rupt Request and the EPAK Interrupt Request.

FAS216 Requests

This interrupt indicates that an event related to the FAS216 operation has occurred -
such as a SCSI state sequence has completed. It is negated by a hardware or software
reset to the FAS216 or a read from the FAS216 Interrupt Register.
The FAS216 does not provide a single mechanism (or bit) to disable all interrupt
requests. Individual interrupt sources can be controlled within the chip, see the
FAS216 documentation for more information. The current state of FAS216 Interrupt
Request signal (INT) can be read in the INT status bit of the FAS216 Status Register.

EPAK Requests (-EPIRQ)

The EPAK module can request 68060 interrupt service. It is typically used by EPAK
devices that do not support vectored interrupt requests. It is negated when the appro-
priate flags in the EPAK module are cleared.
The ability to disable or check the state of this interrupt request is a function of the
EPAK module design.
The interrupt is enabled by setting the L3E bit in the SCV64 Local Interrupt Enable
Register. The current state of this signal can be read in the LI3 status bit of the SCV64 Local
Interrupt Status Register. The interrupt request level presented to the 68060 is determined
by 3L2, 3L1, and 3L0 control bits in the SCV64 Local Interrupts 3 and 2 Control Register.
The SCV64 interrupt input is driven by the FAS216 INT or the EPAK EPIRQ signal. The
FAS216 INT [-SCINT] or the EPAK [-EPIRQ] signals drive the SCV64 interrupt input pin
-LIRQ3 through signal line [-INTP<3>].

EPAK Vectored Interrupt Request

This interrupt is driven by the EPAK Vectored Interrupt Request signal [-EPVIR]. When
the 68060 acknowledges the interrupt the SCV64 asserts EPAK Vectored Interrupt
Acknowledge (-EPVIA) back to the EPAK module. The interrupt request is negated auto-
matically by logic on the EPAK that responds to the interrupt acknowledge (-EPVIA)
generated by the SCV64.
The interrupt is enabled by setting the L4E bit in the SCV64 Local Interrupt Enable
Register. The current state of this signal can be read in the LI4 status bit of the SCV64 Local
Interrupt Status Register. The interrupt request level presented to the 68060 is determined
by 4L2, 4L1, and 4L0 control bits in the SCV64 Local Interrupts 5 and 4 Control Register.