Scv64 Vme Event; Timer Event; Tick; Figure 12: Timer Block Diagram - Performance Computer PT-VME161 User Manual

Extensible single board computer/controller
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SCV64 VME Event

This interrupt indicates that an event related to VMEbus use has occurred - such as DMA
has finished or a bus error (SCV64 [-KBER] or VMEbus [BERR*]) has occurred. It is
negated when the appropriate flags in the SCV64 status register are cleared.
The interrupt is enabled by setting the L1E bit in the SCV64 Local Interrupt Enable
Register. The current state of this signal can be read in the LI1 status bit of the SCV64 Local
Interrupt Status Register. The interrupt request level presented to the 68060 is determined
by 1L2, 1L1, and 1L0 control bits in the SCV64 Local Interrupts 1 and 0 Control Register.
The SCV64 -VMEINT output drives the SCV64 interrupt input pin -LIRQ1 through signal
line [-INTP<1>].

Timer Event

The outputs of the Tick Timer and three Interval Timers are OR'ed together generating a
single interrupt to the CPU. This interrupt indicates that a Timer period has expired.
The Timer Event interrupt is enabled by setting the L2E bit in the SCV64 Local Interrupt
Enable Register. The current state of this signal can be read in the LI2 status bit of the
SCV64 Local Interrupt Status Register. The interrupt request level presented to the 68060
is determined by 2L2, 2L1, and 2L0 control bits in the SCV64 Local Interrupts 3 and 2
Control Register.

Figure 12: Timer Block Diagram

System Control
Register 2
EITI
Interval Timers
ETTI
The SCV64 interrupt input is driven by the logical OR of the SCV64 TICK output and the
82C54 interrupt output. System Status Register 3 identifies the source of the Timer Event.
After reset, the Tick Timer interrupts are enabled and the Interval Timer interrupts are
disabled to maintain compatibility with PT-VME151.

Tick

Interval Timer
Interrupt Request
Tick Timer
Interrupt Request
The output of the Tick Timer is negated by clearing the CLRTIK control bit in the
SCV64 Status Register 0.
Interrupts from the Tick Timer can be disabled by clearing the ETTI bit (6) in System
Control Register 2. See "Tick Timer" on page 38 for more information.
Extensible Single Board Computer/Controller User's Manual 41
Performance Computer
SCV64
Timer Event
LIRQ2
TICK

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