Performance Computer PT-VME161 User Manual page 124

7
Section APPENDICES
Step 6
Step 7
Step 8
Step 9
Step 10 Set the DMAGO bit of SCV64 Control and Status Register to start the DMA.
Step 11 Wait for the DONE bit of the SCV64 Control and Status Register to become set, which
110 Extensible Single Board Computer/Controller User's Manual
Set the DMA24 bit of SCV64 Mode Control Register to enable the DMA to operate as an
A24 master.
Write 200h to SCV64 DMA Transfer Count Register to perform 512 longword transfers (2
Kbytes).
Clear TXATOM bit of SCV64 Mode Control Register to put tx FIFO into decoupled mode.
Write 0 to SCV64 Control and Status Register, clearing the LBERR, VBERR, DONE and
DMAGO bits.
indicates DMA completion, if the VBERR or LBERR bits become set instead, an error has
occurred.