Generating Vmebus Interrupts; Example; Receiving Vmebus Interrupts - Performance Computer PT-VME161 User Manual

7
Section APPENDICES
Step 8
Step 9

Generating VMEbus Interrupts

Step 1
Step 2
Step 3

Example:

To generate a level 4, vector 40h VMEbus interrupt, perform the following steps:
Step 1
Step 2
Step 3

Receiving VMEbus Interrupts

Step 1
Step 2
Example:
To accept only level 1 and level 7 VMEbus interrupts, perform the following steps:
Step 1
Step 2
108 Extensible Single Board Computer/Controller User's Manual
another board can get at the location monitor in A24 space at any address with a valid A24
address modifier.
Do a dummy read from SCV64 Location Monitor FIFO Read Port to clear the previous
location monitor entry.
Read the BI bit of SCV64 Status Register 1 to make sure it's cleared. Thus, verifying that
the slave image is now available on the VMEbus.
Make sure the system is not in BI-mode (refer to steps 6-9 of "Setting Up A24/A32 Slave
Images on the Bus").
Program the SCV64 VMEbus Interrupt Vector Register with the interrupt vector desired.
Select appropriate VMEbus interrupt level and assert the VMEbus interrupt by writing to
the SCV64 VMEbus Interrupter Register.
Exit BI-mode. Follow steps 7-9 of the section "Setting Up A24/A32 Slave Images on the
Bus" on page 105.
Write 40h to SCV64 VMEbus Interrupt Vector Register, programming the interrupt vector.
Write Ch to SCV64 VMEbus Interrupter Register, selecting a level 4 interrupt and asserting
it on the VMEbus.
Make sure the system is not in BI-mode (refer to steps 7-9 of Setting Up A24/A32 Slave
Images).
Program the SCV64 VMEbus Interrupt Enable Register to accept the desired VMEbus
interrupt levels.
Exit BI-mode. Follow steps 7-9 of the section "Setting Up A24/A32 Slave Images on the
Bus".
Write 41h to the SCV64 VMEbus Interrupt Enable Register. This will allow level 1 and 7
VMEbus interrupts to be accepted.