Features - Performance Computer PT-VME161 User Manual

1
Section PT-VME161 INTRODUCTION

Features

• MC68060 Thirty-Two Bit Microprocessor With Internal Cache and FPU
• 4, 8, 16, 32 or 64 Megabytes of Shared DRAM
• Parity Checking
• Two 32 Pin JEDEC Sockets (Bytewide Port)
• Flexible EPAK Interface Extension Capability
• VME64™ VMEbus Interface Features
• Fast SCSI-2 Single Ended Interface Based Upon EMULEX FAS216
• 82C54 CHMOS Programmable Interval Timer
4 Extensible Single Board Computer/Controller User's Manual
PT-VME161 utilizes 50 MHz MC68060 MPU w/Memory Management Unit
PT-VME161E utilizes 50 MHz MC68EC060 MPU w/o MMU or FPU
MC68040-Compatible Integer Execution Unit
MC68881/MC68882-Compatible Floating Point Unit
Independent Instruction and Data Memory Management Units
8KByte Physical Instruction Cache and 8KByte Physical Data Cache Accessible Simultaneously
Low Latency Bus Accesses for Reduced Cache-Miss Penalty
Concurrent Integer Unit, FPU, MMU, and Bus Controller Operation Maximizes Throughput
User Object-Code Compatibility with all Earlier M68000 Microprocessors
4 Clock Local Access
68060 Cache Burst Read Mode (4-2-2-2 Clock Timing)
For 16, 32 or 64 Megabyte configurations
Both sockets support ROM, PROM, EPROM, and Flash EPROM devices
One socket is additionally capable of supporting SRAM and RTC devices
Supports Slave, DMA, and Buffered DMA I/O Functions
Options for Ethernet, High Speed SYNC SIO, High Density ASYNC SIO, etc.
Front Panel Interconnect
SCV64 ASIC
Full VMEbus System Controller w/Auto-Program Option
VMEbus Requester, Interrupter, and Interrupt Handler
Tick and Watchdog Timers, General Purpose Clocks
60 MByte per second D64MBLT (VME64) Data Transfer Rate
VMEbus A64/A32/A24/A16 Address Interface
VMEbus D64MBLT/D32BLT/D16BLT/D32/D16/D8(EO), UAT, RMW Data Interface
Location Monitor w/Message FIFO
Programmable Slave Address Mapping And Protection
Integral A32:D32 Local DMA Controller w/Burst Capabilities
Programmable Burst Sizes on Local Bus DMA Operations
Supports ANSI X3.131-1986 and X3T9.2/86-109 Rev. 10c Standards
10 MByte per second SCSI Data Transfer Rate
Active SCSI bus termination
DMA Support To Local DRAM
P2 SCSI Interconnect
Three independent 16-bit counters
Provides Interrupt