The Differences Between The Pt-Vme161 And The Vme151; Scv64; Differences - Performance Computer PT-VME161 User Manual

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Section APPENDICES
APPENDIX F: The differences between the PT-VME161 and the VME151
It may be desirable to run software written for the PT-VME151/151A on a PT-VME161. Most of the new
features on the 161 are disabled after reset, making them transparent to existing software. This appendix
is an overview of the programming issues that must be considered when porting code from the PT-
VME151A/151AE to the PT-VME161.

SCV64

The DARF64 and ACC chips used on the VME141/151/151A have been combined into one chip, the
SCV64. The SCV64 has all the features of the DARF64 and ACC plus a few more.

Differences:

Register map - The DARF64 registers have been retained at the same addresses (starting with
$18000000). The ACC registers in the SCV64 begin at $18000080, instead of $10000000. Accesses to
$10000000 will terminate with a bus error.
ACC registers were byte-wide and had addresses $10000000 to$1000000F on the VME131/141/151/
151A. On the VME161 the same registers will begin at $18000080. Additionally, all the ACC registers
will occupy longword registers on the SCV64 and will appear in bits 7-0. The remaining bits, 31-8, have
invalid data.
Existing VME131/141/151/151A code probably accesses ACC registers with byte instructions. This
code will also work with the SCV64 if the least significant byte of the longword register is selected using
address bits 1-0 set to 1. This means that SCV64 longword register addresses $80-$BC should have their
2 least significant address bits set, making the addresses $83-$BF. All other SCV64 registers must be
accessed as longword registers on longword boundaries, which is consistent with the DARF64. See
Table 6.
Watchdog reset - the previous single board computers (131/141/ 151/151A) had a jumper to enable the
watchdog reset function of the ACC. The ACC input pin is not present on the SCV64 and the watchdog
reset timer is enabled using a bit from the Miscellaneous Control Register (address $180000C0). The
old watchdog enable jumper, K1, is still present on the VME161, but has no function. This was done to
retain the jumper numbering for ease of documentation.
SYSFAIL* - The VMEbus SYSFAIL* signal may now be driven by the SCV64. The ACC had a level-
7 interrupt which was tied to SYSFAIL*, but the ACC could not assert it. Additionally, when the SCV64
drives SYSFAIL, the FAULT led on the front panel will be turned on. SYSFAIL* will still cause the
same level-7 interrupt on the SCV64.
The VME131/141/151/151A drove SYSFAIL* and the FAULT led using a bit from the 68681 DUART
(the FAULT bit). This functionality has been retained for code compatibility.
Note that upon reset, both the SCV64 and the 68681 drive SYSFAIL*, meaning that initialization code
will have to deassert SYSFAIL* from both the SCV64 and the 68681.
Delay line calibration - the SCV64 contains several internal delay lines, accessible as part of the SCV64
register set. These delay lines must be calibrated using a software algorithm detailed in the SCV64 User
Manual. These calibrations are done as part of the PTBUG initialization sequence and need not be
repeated. However, initialization code written by the user must follow the calibration algorithm detailed
in the SCV64 User Manual.
90 Extensible Single Board Computer/Controller User's Manual