interrupt setup .....................................................................................................40
Output Port Register
OPR0 .............................................................................................................52
OPR1 .............................................................................................................52
OPR3 .............................................................................................................52
OPR5 .............................................................................................................52
OPR6 .............................................................................................................52
OPR7 .............................................................................................................53
E
EBOARD ..................................................................................................................57
EEPROM, serial ........................................................................................................31, 52, 53
EPAK ........................................................................................................................42, 57, 59
address space .......................................................................................................46, 96
EPIRQ .................................................................................................................42
installation ...........................................................................................................20
Interrupt Request .................................................................................................42
interrupt setup .....................................................................................................40
Master Bus Error - DRAM Parity .......................................................................30
Pin assignments ...................................................................................................78
VMEbus Master access .......................................................................................46
zero wait state access ..........................................................................................57
EPROM .....................................................................................................................31
configuration .......................................................................................................14
Example
Initiating DMA transfers .....................................................................................109
VMEbus Interrupts
generation ......................................................................................................108
receiving ........................................................................................................108
VMEbus setup .....................................................................................................107
F
FAS216 .....................................................................................................................54, 59, 72
Alternate DMA mode .........................................................................................54, 94
Configuration Register 3 .....................................................................................54
Alternate DMA mode ...................................................................................94
DMA ...................................................................................................................46, 55
Interrupt Register ................................................................................................42
Interrupt Request .................................................................................................42
Mode 2 ................................................................................................................54
Extensible Single Board Computer/Controller User's Manual 119
Performance Computer
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