Evfu Loading Block Diagram; Evfu Loading Sequence Timing Diagram - Printronix p300 Maintenance Manual

VFU
DB1–DB4 ADDRESS
4 MEMORY
COUNTER
(4 X 132)
SPI
NSPI
(ENABLE) (CLOCK)
INTERFACE
NSTL
VFU LOAD
LD
LD
CONTROL
NELD
LOGIC
NVSC
MEMORY
ELD (END LOAD) ELD COUNTER
LOGIC
SPI
Figure 2–29. EVFU Loading Block Diagram
Figure 2–30. EVFU Loading Sequence Timing Diagram
2–46 P300/P600 Principles of Operation