Interface Block Diagram - Printronix p300 Maintenance Manual

IDB1
8
IDB8
IPI
RECEIVERS
ICSTB
IDSTB
IDR
IONL
IRDY
DRIVERS
ICPE
ICBY
IACK
P300/P600 Principles of Operation
BIT 8
DISABLE
W4
POLARITY
W7
PS
DATA
LINES
8
7
PI
POLARITY
CSTB
DSTB
DR
LOGIC
ONL
RDY
(DP)
READY
<BUSY> EDT (ENABLE DATA TRANSFER)
<ACK>
Figure 2–3. Interface Block Diagram
SOV
BIT 8
BITS 1–7
BUFFER
PI DISABLE
W5
NPIC
SELF TEST
INVERT DSTB
W2
DR (DATA REQUEST)
ONL (ON LINE)
RDY (READY)
4 usec
DELAY
(EXTENDED CHAR SET)
BIT 8
TO PRINTER
BUFFER
IDB1–IDB7
7
(CLEAR)
LATCHES
(FLAG)
STROBE
TIMING
CLK
LOGIC
EDT
2–7
NECS
DSTB
NSTB3