Port D - Motorola DragonBall MC68328 User Manual

Integrated processor
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Parallel Ports
15
14
13
12
0
0
0
0
Address: $FFFFF412
DIRECTION- DIR[7:0]
These bits control the pin directions. While high, the pins are outputs; while low, the pins
are inputs. These bits reset to 0 and have no function while the SELECT bits are low. Note
that bits 2,3, and 7, while implemented, do not control any I/O port pins.
DATA- D[7:0]
These bits control or report the data on the pins while the associated SELECT bits are
high. While the DIRECTION bits are high, the DATA register bits control the pins. While
the DIRECTION bits are low, "other functions" report the signal driving the pins. These bits
reset to 0. The data bits may be written at any time. Bits that are configured as inputs will
accept the written data, but it will not be accessible until the respective pins are configured
as outputs. The actual value on the pin is reported when these bits are read.
SELECT- SEL[7:0]
These bits select whether address or port signals are connected to the pins. While high,
the port I/O function is connected to the pin; while low, the address pins are connected.

7.1.5 Port D

Port D has features intended for use as a keyboard input port; however, it can be used as a
general-purpose port. Multiple keyboard support functions are provided. As with the other
ports, each pin can be configured as an input or output on a bit-by-bit basis. While config-
ured as inputs, each pin can generate a CPU interrupt. Additionally, a group interrupt can
be generated. This interrupt is the OR (negative logic) of all pins on the port. Generated
interrupts can be sensitive to either level or edges as selected by users. Additionally, the
polarity can be selected. Each pin is also equipped with a switchable pullup resistor. The
programmer's model for port D is shown below.
15
14
13
12
DIRECTION
DIR7
DIR6
DIR5
DIR4
Address: $FFFFF418
15
14
13
12
PU7
PU6
PU5
PU4
Address: $FFFFF41A
7-6
MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11
10
9
UNUSED
0
0
0
Figure 7-9. Port C Select Register
11
10
9
DIR3
DIR2
DIR1
Figure 7-10. Port D Data/Direction Register
11
10
9
PULLUP
PU3
PU2
PU1
Figure 7-11. Port D Pullup Register
8
7
6
5
0
SEL7
SEL6
SEL5
8
7
6
5
DIR0
D7
D6
D5
8
7
6
5
PU0
0
0
0
4
3
2
1
SELECT
SEL4
SEL3
SEL2
SEL1
Reset Value: $0000
4
3
2
1
DATA
D4
D3
D2
D1
Reset Value: $0000
4
3
2
1
UNUSED
0
0
0
0
Reset Value: $0000
MOTOROLA
0
SEL0
0
D0
0
0

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