Timer-Compare Register; Timer-Capture Register; Timer-Status Register - Motorola DragonBall MC68328 User Manual

Timer
15 14 13 12
Timer 1 Address: (FF)FFF604
Timer 2 Address: (FF)FFF610
This register is set to all 1's at system reset. The "compare" value is not matched until the
counter increments to equal this value.
6.4.1.5 TIMER-CAPTURE REGISTER. Each capture register is a 16-bit register that
latches the counter value during a capture operation when an edge occurs on the TIN pin,
as programmed in the timer-control register. This register appears as a memory-mapped
read-only register to users and is cleared at system reset.
15 14 13 12
Timer 1 Address: $(FF)FFF606
Timer 2 Address: $(FF)FFF612

6.4.1.6 TIMER-STATUS REGISTER.

The status register indicates the timer status. When a "capture" event occurs, it is posted by
setting the CAPT bit. When a "compare" event occurs, the COMP bit is set. Users must clear
these bits to clear the interrupt (if enabled). These bits are cleared by writing $00 and will
clear only if they have been read while set, which ensures that an interrupt will not be missed
if it occurs between the status-read and the interrupt-clear.
15 14 13 12
Timer 1 Address: $(FF)FFF60A
Timer 2 Address: $(FF)FFF616
CAPT Capture Event
While high, this bit indicates that a "capture" event occurred.
0 = No capture event occurred
1 = Capture event occurred
COMP Compare Event
While high, this bit indicates that a "compare" event occurred.
0 = No compare event occurred
1 = Compare event occurred
6-6 MC68328 DRAGONBALL PROCESSOR USER'S MANUAL
11 10 9 8
COMPARE VALUE
Figure 6-6. Timer-Compare Register
11 10 9 8
CAPTURE VALUE
Figure 6-7. Timer-Capture Register
11 10 9 8
UNUSED
Figure 6-8. Timer Status Register
7 6 5 4
7 6 5 4
7 6 5 4
3 2 1 0
Reset Value: $FFFF
3 2 1 0
Reset Value: $0000
3 2 1 0
CAPT COMP
Reset Value: $0000
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