AMD Geode LX 600@0.7W Data Book page 83

GLIU Register Descriptions
4.2.4.4 P2D Range Offset Descriptor (P2D_RO)
GLIU0 P2D_RO[2:0]
MSR Address 10000029h-1000002Bh
Type R/W
Reset Value 00000000_000FFFFFh
See Table 4.1.3.1 "Memory Routing and Translation" on page 47 for details on the descriptor usage.
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
PDID1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
PMAX
Bit Name
63:61 PDID1
60 PCMP_BIZ
59:40 POFFSET
39:20 PMAX
19:0 PMIN
AMD Geode™ LX Processors Data Book
P2D_RO Register Map
OFFSET
P2D_RO Bit Descriptions
Description
Descriptor Destination ID. These bits define which Port to route the request to, if it is a
'hit' based on the other settings in this register.
000: Port 0 (GLIU0 = GLIU; GLIU1 = GLIU.)
001: Port 1 (GLIU0 = GLMC; GLIU1 = Interface to GLIU0.)
010: Port 2 (GLIU0 = Interface to GLIU1; GLIU1 = VP.)
011: Port 3 (GLIU0 = CPU Core; GLIU1 = GLCP.)
100: Port 4 (GLIU0 = DC; GLIU1 = GLPCI.)
101: Port 5 (GLIU0 = GP; GLIU1 = VIP.)
110: Port 6 (GLIU0 = Not Used; GLIU1 = SB.)
111: Port 7 (GLIU0 = Not Used; GLIU1 = Not Used.)
Compare Bizzaro Flag.
0: Consider only transactions whose Bizzaro flag is low as a potentially valid address hit.
A low Bizzaro flag indicates a normal transaction cycle such as a memory or I/O.
1: Consider only transactions whose Bizzaro flag is high as a potentially valid address
hit. A high Bizzaro flag indicates a 'special' transaction, such as a PCI Shutdown or
Halt cycle.
Physical Memory Address 2's Comp Offset. 2s complement offset that is added to
physical address on a hit.
Physical Memory Address Max. These bits form the value denoting the upper (ending)
address of the physical memory, which is compared to determine a hit.
Physical Memory Address Min. These bits form the value denoting the lower (starting)
address of the physical memory, which is compared to determine a hit. Hence, a hit
occurs if the physical address [31:12] >= PMIN and <= PMAX.
33234H
PMAX
9 8 7 6 5 4 3
PMIN
2 1 0
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