AMD Geode LX 600@0.7W Data Book page 348

33234H
6.6.12.2 DC Color Key Mask (DC_CLR_KEY_MASK)
DC Memory Offset 0BCh
Type R/W
Reset Value 00xxxxxxh
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RSVD
Bit Name
31:24 RSVD
23:0 CLR_KEY_
MASK
6.6.12.3 DC Color Key Horizontal Position (DC_CLR_KEY_X)
DC Memory Offset 0C0h
Type R/W
Reset Value 00000000h
Settings written to this register do not take effect until the start of the following frame or interlaced field.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RSVD
Bit Name
31:27 RSVD
26:16 CLR_KEY_X_
END
15:11 RSVD
10:0 CLR_KEY_X_
START
6.6.12.4 DC Color Key Vertical Position (DC_CLR_KEY_Y)
DC Memory Offset 0C4h
Type R/W
Reset Value 00000000h
Settings written to this register do not take effect until the start of the following frame or interlaced field.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
RSVD
348
DC_CLR_KEY_MASK Register Map
DC_CLR_KEY_MASK Bit Descriptions
Description
Reserved. Set to 0.
Color Key Mask. This field is ANDed with both the pixel and the color key value (in
DC_CLR_KEY, DC Memory Offset 0B8h[23:0]) before comparing the values. This allows
the value of some bits to be ignored when performing the match.
DC_CLR_KEY_X Register Map
CLR_KEY_X_END
DC_CLR_KEY_X Bit Descriptions
Description
Reserved. Set to 0.
Color Key Horizontal End. This field indicates the horizontal end position of the color
key region minus 1.This represents the first pixel past the end of the color key region.
This field is 0-based; the upper left pixel of the screen is represented by (0,0).
Reserved. Set to 0.
Color Key Horizontal Start. This field represents the horizontal start position of the color
key region minus 1. This represents the first pixel within the color key region.
DC_CLR_KEY_Y Register Map
CLR_KEY_Y_END
Display Controller Register Descriptions
9 8 7
CLR_KEY_MASK
9 8 7
RSVD CLR_KEY_X_START
9 8 7
RSVD CLR_KEY_Y_START
AMD Geode™ LX Processors Data Book
6 5 4 3 2 1 0
6 5 4 3 2 1 0
6 5 4 3 2 1 0