AMD Geode LX 600@0.7W Data Book page 310

33234H
6.6.1.5 GLD Power Management MSR (GLD_MSR_PM)
MSR Address 80002004h
Type R/W
Reset Value 00000000_00000015h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Name
63:6 RSVD
5:4 VGA_GLCLK_
PMODE
3:2 DCLK_PMODE
1:0 G:CLK_PMODE
6.6.1.6 GLIU0 Device Diagnostic MSR (GLD_MSR_DIAG)
MSR Address 80002005h
Type R/W
Reset Value 00000000_00000000h
This register is reserved for internal use by AMD and should not be written to.
310
GLD_MSR_PM Register Map
RSVD
RSVD
GLD_MSR_PM Bit Descriptions
Description
Reserved. Set to 0.
VGA GLIU0 Clock Power Management Mode. This field controls the internal clock
gating for the GLIU0 clock to the VGA module.
00: Clock is not gated.
01: Enable active hardware clock gating. Hardware automatically determines when it is
idle, and internally disables the GLIU0 clock whenever possible.
10: Reserved.
11: Reserved.
Dot Clock Power Management Mode. This field controls the internal clock gating for
the Dot clock to all logic other than the VGA unit.
00: Clock is not gated.
01: Enable active hardware clock gating. Hardware automatically determines when it is
idle, and internally disables the Dot clock whenever possible.
10: Reserved.
11: Reserved.
GLIU0 Clock Power Management Mode. This field controls the internal clock gating
for the GLIU0 Clock to all logic other than the VGA unit.
00: Clock is not gated.
01: Enable active hardware clock gating. Hardware automatically determines when it is
idle, and internally disables the GLIU0 clock whenever possible.
10: Reserved.
11: Reserved.
Display Controller Register Descriptions
9 8 7 6 5 4 3
AMD Geode™ LX Processors Data Book
2 1 0