AMD Geode LX 600@0.7W Data Book page 311

Display Controller Register Descriptions
6.6.2 Display Controller Specific MSRs
6.6.2.1 SPARE MSR
MSR Address 80000011h
Type R/W
Reset Value 00000000_00000000h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Name
63:7 RSVD
6 DISABLE_
VFIFO_WM
5:0 RSVD
6.6.2.2 DC RAM Control MSR (DC_RAM_CTL_MSR)
MSR Address 80000012h
Type R/W
Reset Value 00000000_02020202h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Name
63:11 RSVD
10:8 CFIFO_CTL
7:3 RSVD
2:0 DV_RAM_CTL
AMD Geode™ LX Processors Data Book
SPARE_MSR Register Map
RSVD
RSVD
SPARE_MSR Bit Descriptions
Description
Reserved.
Disable Video FIFO Watermarks. When set, the video watermarks in
DC_ARB_CFG[19:12] have no effect.
Reserved.
DC_RAM_CTL_MSR Register Map
RSVD
RSVD
DC_RAM_CTL_MSR Bit Descriptions
Description
Reserved.
CFIFO RAM Delay Control.
Reserved.
DV RAM Delay Control.
33234H
9 8 7 6 5 4 3 2
RSVD
9 8 7 6 5 4 3 2
RSVD
1 0
1 0
311