AMD Sempron 10 Datasheet
AMD Sempron 10 Datasheet

AMD Sempron 10 Datasheet

Processor with 256k l2 cache
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AMD Sempron
TM
Processor Model 10
with 256K L2 Cache
Data Sheet
Publication # 31994 Rev. A-1
Issue Date: August 2004

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Summary of Contents for AMD Sempron 10

  • Page 1 AMD Sempron Processor Model 10 with 256K L2 Cache Data Sheet Publication # 31994 Rev. A-1 Issue Date: August 2004...
  • Page 2 AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD Arrow logo, AMD Athlon, AMD Duron, AMD Sempron, and combinations thereof, QuantiSpeed, and 3DNow! are trademarks of Advanced Micro Devices, Inc. HyperTransport is a licensed trademark of the HyperTransport Technology Consortium.
  • Page 3: Table Of Contents

    Push-Pull (PP) Drivers ....... . 6 AMD Athlon™ System Bus Signals ..... . 6 Logic Symbol Diagram.
  • Page 4 AMD Pin ........
  • Page 5 Ordering Information....... . . 77 Standard AMD Sempron Processor Model 10 Products ..77 Appendix A Thermal Diode Calculations .
  • Page 6 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table of Contents...
  • Page 7: List Of Figures

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 List of Figures Figure 1. Typical AMD Sempron™ Processor Model 10 System Block Diagram ......... 4 Figure 2.
  • Page 8 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 viii List of Figures...
  • Page 9: List Of Tables

    333 FSB AMD Athlon™ System Bus AC Characteristics ..23 Table 4. 333 FSB AMD Athlon System Bus DC Characteristics ..24 Table 5. Interface Signal Groupings ......25 Table 6.
  • Page 10 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 List of Tables...
  • Page 11: Revision History

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Revision History Date Description August 2004 Initial release of the AMD Sempron™ Processor Model 10 Data Sheet ■ Revision History...
  • Page 12 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Revision History...
  • Page 13: Overview

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Overview The AMD Sempron™ processor model 10 with 256K of L2 cache, the new value brand for every-day computing, performs at the top of its class. Using QuantiSpeed™ architecture, this...
  • Page 14 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 The AMD Sempron processor model 10 with 256K of L2 cache is binary-compatible with existing x86 software and backwards compatible with applications optimized for MMX™, SSE, and 3 D N o w ! ™...
  • Page 15: Quantispeed™ Architecture Summary

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 QuantiSpeed™ Architecture Summary The following design features summarize the QuantiSpeed architecture of the AMD Sempron processor model 10 with 256K of L2 cache: A nine-issue, superpipelined, superscalar x86 processor ■...
  • Page 16 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Thermal Monitor AMD Sempron™ Proces- sor Model 10 AMD Athlon™ System Bus AGP Bus Memory Bus System Controller SDRAM or DDR (Northbridge) PCI Bus Peripheral Bus Con-...
  • Page 17: Interface Signals

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Interface Signals This section describes the interface signals utilized by the AMD Sempron™ processor model 10. Overview The AMD Athlon system bus architecture is designed to deliver...
  • Page 18: Push-Pull (Pp) Drivers

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Push-Pull (PP) Drivers The AMD Sempron processor model 10 supports push-pull (PP) drivers. The system logic configures the processor with the configuration parameter called SysPushPull (1=PP). The...
  • Page 19: Logic Symbol Diagram

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Logic Symbol Diagram Figure 2 is the logic symbol diagram of the processor. This diagram shows the logical grouping of the input and output signals.
  • Page 20 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Logic Symbol Diagram Chapter 3...
  • Page 21: Power Management

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Power Management This chapter describes the power management control system of the AMD Sempron™ Processor Model 10. The power management features of the processor are compliant with the ACPI 1.0b and ACPI 2.0 specifications.
  • Page 22: Working State

    Stop Grant special bus cycle on the AMD Athlon system bus. The processor is not in a low-power state at this time, because the AMD Athlon system bus is still connected. After the Northbridge disconnects the AMD Athlon...
  • Page 23 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 must first connect the system bus. Connecting the system bus places the processor into the higher power probe state. After the Northbridge has completed all probes of the processor, the Northbridge must disconnect the AMD Athlon system bus again so that the processor can return to the low-power state.
  • Page 24: Probe State

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 In C2, probes are allowed, as shown in Figure 3 on page 9 The Stop Grant state is also entered for the S1, Powered On...
  • Page 25 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 interrupt for Halt or STPCLK# deassertion. Reconnect is initiated by the Northbridge to probe the processor. The Northbridge contains BIOS programmable registers to enable the system bus disconnect in response to Halt and Stop Grant special cycles.
  • Page 26: Figure 4. Amd Athlon™ System Bus Disconnect Sequence In

    PROCRDY CLKFWDRST PCI Bus Stop Grant Figure 4. AMD Athlon™ System Bus Disconnect Sequence in the Stop Grant State An example of the AMD Athlon system bus disconnect sequence is as follows: 1. The peripheral controller (Southbridge) asserts STPCLK# to place the processor in the Stop Grant state.
  • Page 27: Figure 5. Exiting The Stop Grant State And Bus Connect Sequence

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Figure 5 shows the signal sequence of events that takes the processor out of the Stop Grant state, connects the processor to the AMD Athlon system bus, and puts the processor into the Working state.
  • Page 28: Connect State Diagram

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Connect State Figure 6 below and Figure 7 on page 17 show the Northbridge Diagram and processor connect state diagrams, respectively. Condition Action 1 A disconnect is requested and probes are still pending.
  • Page 29: Figure 7. Processor Connect State Diagram

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Connect Connect Pending 2 Disconnect Pending Connect Pending 1 Disconnect Condition Action CONNECT is deasserted by the Northbridge (for a A CLKFWDRST is asserted by the Northbridge.
  • Page 30: Clock Control

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Clock Control The processor implements a Clock Control (CLK_Ctl) MSR (address C001_001Bh) that determines the internal clock divisor when the AMD Athlon system bus is disconnected.
  • Page 31: Cpuid Support

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 CPUID Support AMD Sempron™ processor model 10 version and feature set recognition can be performed through the use of the CPUID instruction, that provides complete information about the processor—vendor, type, name, etc., and its capabilities.
  • Page 32 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 CPUID Support Chapter 5...
  • Page 33: 333 Fsb Amd Sempron™ Processor Model 10 With 256K L2 Cache Specifications

    3. These currents occur when the AMD Athlon™ system bus is disconnected and has a low power ratio of 1/8 for Stop Grant disconnect and a low power ratio of 1/8 Halt disconnect applied to the core clock grid of the processor as dictated by a value of 2003_1223h programmed into the Clock Control (CLK_Ctl) MSR.
  • Page 34: Fsb Amd Sempron Processor Model 10 Sysclk And Sysclk# Ac Characteristics

    1. The AMD Athlon™ system bus operates at twice this clock frequency. 2. Circuitry driving the AMD Athlon system bus clock inputs must exhibit a suitably low closed-loop jitter bandwidth to allow the PLL to track the jitter. The –20dB attenuation point, as measured into a 20 or 30 pF load must be less than 500 kHz.
  • Page 35: 333 Fsb Amd Athlon™ System Bus Ac Characteristics

    RSTCLK rising edge to output valid for PROCRDY. Test Load is 25 pF. 6. T is setup of CONNECT/CLKFWDRST to rising edge of RSTCLK. T is hold of CONNECT/CLKFWDRST from rising edge of RSTCLK. Chapter 6 333 FSB AMD Sempron™ Processor Model 10 with 256K L2 Cache Specifications...
  • Page 36: 333 Fsb Amd Athlon™ System Bus Dc Characteristics

    DC source and a sufficiently quiet AC response to adhere to the ± 50 mV specification listed above. 2. Measured at V / 2. CC_CORE 333 FSB AMD Sempron™ Processor Model 10 with 256K L2 Cache Specifications Chapter 6...
  • Page 37: Electrical Data

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Electrical Data This chapter describes the electrical characteristics that apply to all desktop AMD Sempron™ processors model 10 with 256K L2 cache. Conventions The conventions used in this chapter are as follows: Current specified as being sourced by the processor is ■...
  • Page 38: Voltage Identification (Vid[4:0])

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 5. Interface Signal Groupings (continued) Signal Group Signals Notes See “General AC and DC Characteristics” on page 32, “INTR Pin” on page 72, “NMI Pin” on page 72, “SMI# RESET#, INTR, NMI, SMI#, INIT#, A20M#, Pin”...
  • Page 39: Frequency Identification (Fid[3:0])

    1. The FID pins must not be pulled above 2.625 V, which is equal to 2.5 V plus a maximum of five percent. 2. Refer to “VCC_2.5V Generation Circuit” found in the section, “Motherboard Required Circuits,” of the AMD Athlon™ Processor- Based Motherboard Design Guide, order# 24363.
  • Page 40: Vcc_Core

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Characteristics CC_CORE Table 9 shows the AC and DC characteristics for V . See CC_CORE Figure 9 on page 29 for a graphical representation of the waveform.
  • Page 41: Figure 9. Vcc_Core Voltage Waveform

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Figure 9 shows the processor core voltage (V C C_C ORE waveform response to perturbation. The t (negative AC MIN_AC transient excursion time) and t...
  • Page 42: Absolute Ratings

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Absolute Ratings The AMD Sempron processor model 10 should not be subjected to conditions exceeding the absolute ratings, as such conditions can adversely affect long-term reliability or result in functional damage.
  • Page 43: Sysclk And Sysclk# Dc Characteristics

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 SYSCLK and SYSCLK# DC Characteristics Table 11 shows the DC characteristics of the SYSCLK and SYSCLK# differential clocks. The SYSCLK signal represents CLKIN and RSTCLK tied together while the SYSCLK# signal represents CLKIN# and RSTCLK# tied together.
  • Page 44: General Ac And Dc Characteristics

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 7.10 General AC and DC Characteristics Table 12 shows the AMD Sempron processor model 10 AC and DC characteristics of the Southbridge, JTAG, test, and miscellaneous pins.
  • Page 45: Table 12. General Ac And Dc Characteristics

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 12. General AC and DC Characteristics (continued) Symbol Parameter Description Condition Units Notes Sync Input Setup Time 4, 5 Sync Input Hold Time 4, 5...
  • Page 46: Open Drain Test Circuit

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 7.11 Open Drain Test Circuit Figure 11 is a test circuit that may be used on automated test equipment (ATE) to test for validity on open-drain pins.
  • Page 47: Thermal Diode Characteristics

    1. The sourcing current should always be used in forward bias only. 2. Characterized at 95°C with a forward bias current pair of 10 µA and 100 µA. AMD recommends using a minimum of two sourcing currents to accurately measure the temperature of the thermal diode.
  • Page 48: Thermal Protection Characterization

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Thermal Protection The following section describes parameters relating to thermal Characterization protection. The implementation of thermal control circuitry to control processor temperature is left to the manufacturer to determine how to implement.
  • Page 49: Apic Pins Ac And Dc Characteristics

    2. The thermal diode is capable of responding to thermal events of 40°C/s or faster. 3. The AMD Sempron™ processor model 10 provides a thermal diode for measuring die temperature of the processor. The processor relies on thermal circuitry on the motherboard to turn off the regulated core voltage to the processor in response to a thermal shutdown event.
  • Page 50 1. Characterized across DC supply voltage range. 2. The 2.625-V value is equal to 2.5 V plus a maximum of five percent. 3. Refer to “VCC_2.5V Generation Circuit” found in the section, “Motherboard Required Circuits,” of the AMD Athlon™ Processor- Based Motherboard Design Guide, order# 24363.
  • Page 51: Signal And Power-Up Requirements

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Signal and Power-Up Requirements The AMD Sempron™ processor model 10 is designed to provide functional operation if the voltage and temperature parameters are within the limits of normal operating ranges.
  • Page 52 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Power-Up Timing Requirements. The signal timing requirements are as follows: 1. RESET# must be asserted before PWROK is asserted. The AMD Sempron processor model 10 does not set the correct clock multiplier if PWROK is asserted prior to a RESET# assertion.
  • Page 53 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 clock must be valid at this time. The system clocks are designed to be running after 3.3 V has been within specification for three milliseconds.
  • Page 54: Clock Multiplier Selection (Fid[3:0])

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Clock Multiplier The chipset samples the FID[3:0] signals in a chipset-specific Selection (FID[3:0]) manner from the processor and uses this information to determine the correct serial initialization packet (SIP). The...
  • Page 55: Mechanical Data

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Mechanical Data Th e A MD S e m p ron ™ p roc es s o r m o d e l 10 c o n ne c t s t o themotherboard through a Pin Grid Array (PGA) socket named Socket A.
  • Page 56: Amd Sempron Processor Model 10 Part Number 27488 Opga Package Dimensions

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 AMD Sempron™ Processor Model 10 Part Number 27488 OPGA Package Dimensions Table 17 shows the part number 27488 OPGA package dimensions in millimeters assigned to the letters and symbols used in the 27488 package diagram, Figure 13 on page 45.
  • Page 57: Figure 13. Amd Sempron Processor Model 10 Part Number 27488 Opga Package Diagram

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Figure 13. AMD Sempron™ Processor Model 10 Part Number 27488 OPGA Package Diagram Chapter 9 Mechanical Data...
  • Page 58: Amd Sempron Processor Model 10 Part Number 27493 Opga Package Dimensions

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 AMD Sempron™ Processor Model 10 Part Number 27493 OPGA Package Dimensions Table 18 shows the part number 27493 OPGA package dimensions in millimeters assigned to the letters and symbols shown in the 27493 package diagram, Figure 14 on page 47.
  • Page 59: Figure 14. Amd Sempron Processor Model 10 Part Number 27493 Opga Package Diagram

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Figure 14. AMD Sempron™ Processor Model 10 Part Number 27493 OPGA Package Diagram Chapter 9 Mechanical Data...
  • Page 60 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Mechanical Data Chapter 9...
  • Page 61: Pin Descriptions

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Pin Descriptions This chapter includes pin diagrams of the organic pin grid array (OPGA) for the AMD Sempron™ processor model 10, a listing of pin name abbreviations, and a cross-referenced listing of pin locations to signal names.
  • Page 62 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Pin Descriptions Chapter 10...
  • Page 63 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Chapter 10 Pin Descriptions...
  • Page 64: Table 19. Pin Name Abbreviations

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name A20M# ANLOG ANALOG AJ13 CLKFR CLKFWDRST AJ21 AG15...
  • Page 65 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name AJ19 AJ27 AL11 AL25 AL27 AA31 AN11...
  • Page 66 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name SAI#5 SADDIN[5]# AE33 SD#3 SDATA[3]# SAI#6 SADDIN[6]#...
  • Page 67 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name SD#37 SDATA[37]# SDOC#2 SDATAOUTCLK[2]# SD#38 SDATA[38]# SDOC#3...
  • Page 68 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name CC_CORE CC_CORE CC_CORE CC_CORE CC_CORE CC_CORE CC_CORE...
  • Page 69 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name AK34 CC_CORE AK36 CC_CORE CC_CORE CC_CORE CC_CORE...
  • Page 70 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 19. Pin Name Abbreviations (continued) Table 19. Pin Name Abbreviations (continued) Abbreviation Full Name Abbreviation Full Name AH12 AH16 AH20 AH24 AH28 AH32 AH34...
  • Page 71: Pin List

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 10.2 Pin List Table 20 on page 60 cross-references Socket A pin location to signal name. The “L” (Level) column shows the electrical specification for this pin.
  • Page 72: Table 20. Cross-Reference By Pin Location

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location Table 20. Cross-Reference by Pin Location Name Description Name Description No Pin page 72 CC_CORE SADDOUT[12]# SADDOUT[5]# CC_CORE SADDOUT[3]#...
  • Page 73 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description NC Pin page 72 SDATA[31]# CC_CORE SDATA[22]# CC_CORE...
  • Page 74 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description NC Pin page 72 NC Pin page 72...
  • Page 75 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description PICCLK page 68 PICD#[0] page 68 PICD#[1] page 68...
  • Page 76 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description CC_CORE CC_CORE FID[0] page 70 FID[1] page 70...
  • Page 77 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description AF30 NC Pin page 72 CC_CORE AF32 NC Pin...
  • Page 78 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description AH16 AH18 CC_CORE AH20 CPU_PRESENCE# page 69 AH22...
  • Page 79 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 20. Cross-Reference by Pin Location (continued) Table 20. Cross-Reference by Pin Location Name Description Name Description AL25 NC Pin page 72 AM32 AM34 AL27...
  • Page 80: Detailed Pin Descriptions

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 10.3 Detailed Pin Descriptions The information in this section pertains to Table 20 on page 60. A20M# Pin A20M# is an input from the system used to simulate address wrap-around in the 20-bit 8086.
  • Page 81: Clkin, Rstclk (Sysclk) Pins

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 CLKIN, RSTCLK Connect CLKIN with RSTCLK and name it SYSCLK. Connect (SYSCLK) Pins CLKIN# with RSTCLK# and name it SYSCLK#. Length match the clocks from the clock generator to the Northbridge and processor.
  • Page 82: Fid[3:0] Pins

    2. BIOS initializes the CLK_Ctl MSR during the POST routine. This CLK_Ctl setting is used with all FID combinations and selects a Halt disconnect divisor and a Stop Grant disconnect divisor. For more information, refer to the AMD Athlon™ and AMD Duron™ Processors BIOS, Software, and Debug Developers Guide, order# 21656.
  • Page 83: Fsb_Sense[1:0] Pins

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 signals High above 2.5 V. Do not expose these pins to a differential voltage greater than 1.60 V, relative to the processor core voltage. Refer to “VCC_2.5V Generation Circuit” found in the section, “Motherboard Required Circuits,”...
  • Page 84: Intr Pin

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 INTR Pin INTR is an input from the system that causes the processor to start an interrupt acknowledge transaction that fetches the 8-bit interrupt vector and starts execution at that location.
  • Page 85: Pwrok Pin

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 PWROK Pin The PWROK input to the processor must not be asserted until all voltage planes in the system are within specification and all system clocks are running within specification.
  • Page 86: Vid[4:0] Pins

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 VID[4:0] Pins The VID[4:0] (Voltage Identification) outputs are used to dictate the V voltage level. The VID[4:0] pins are CC_CORE strapped to ground or left unconnected on the processor package.
  • Page 87: Zn And Zp Pins

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 ZN and ZP Pins ZN (AC5) and ZP (AE5) are the push-pull compensation circuit pins. In Push-Pull mode (selected by the SIP parameter SysPushPull asserted), ZN is tied to V...
  • Page 88 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Pin Descriptions Chapter 10...
  • Page 89: Ordering Information

    1. Spaces are added to the number shown above for viewing clarity only. 2. This processor is available only with an advanced 333 FSB. Figure 17. OPN Example for the AMD Sempron™ Processor Model 10 with 256K L2 Cache Chapter 11...
  • Page 90 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Ordering Information Chapter 11...
  • Page 91: Appendix A Thermal Diode Calculations

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Appendix A Thermal Diode Calculations This section contains information about the calculations for the on-die thermal diode of the AMD Sempron™ processor model 10. For electrical information about this thermal diode, see Table 13, “Thermal Diode Electrical Characteristics,”...
  • Page 92: Temperature Offset Correction

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Equation (1) shows the ideal diode calculation. ⎛ ⎞ ⋅ ⋅ ⋅ -- - T --- - ⎝ ⎠ f lumped Sourcing two currents and using Equation (1) derives the difference in the base-to-emitter voltage that leads to finding the diode temperature as shown in Equation (2).
  • Page 93 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 The formulas in Equation (3) and Equation (4) can be used to calculate the temperature offset for temperature sensors that do not employ series resistance cancellation. The result is added to the value measured by the temperature sensor.
  • Page 94 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Appendix A - Thermal Diode Calculations...
  • Page 95: Appendix B Conventions And Abbreviations

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Appendix B Conventions and Abbreviations This section contains information about the conventions and abbreviations used in this document. Signals and Bits Active-Low Signals — Signal names containing a pound sign, ■...
  • Page 96: Data Terminology

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Data Terminology The following list defines data terminology: Quantities ■ • A word is two bytes (16 bits) A doubleword is four bytes (32 bits) •...
  • Page 97: Abbreviations And Acronyms

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Abbreviations and Acronyms Table 26 contains the definitions of abbreviations used in this document. Table 26. Abbreviations Abbreviation Meaning Ampere Farad Giga– Gbit Gigabit Gbyte...
  • Page 98: Table 27. Acronyms

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 26. Abbreviations (continued) Abbreviation Meaning picofarad picohenry picosecond Second Volt Watt Table 27 contains the definitions of acronyms used in this document. Table 27. Acronyms...
  • Page 99 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 27. Acronyms (continued) Abbreviation Meaning Large Area Network Least-Recently Used LVTTL Low Voltage Transistor Transistor Logic Most Significant Bit MTRR Memory Type and Range Registers...
  • Page 100 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Table 27. Acronyms (continued) Abbreviation Meaning Virtual Address Space Virtual Page Address Video Graphics Adapter Universal Serial Bus Zero Delay Buffer Appendix B - Conventions and Abbreviations...
  • Page 101: Related Publications

    AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Related Publications These documents provide helpful information about the AMD Sempron™ processor model 10, and can be found with o t h e r re l a t e d d o c u m e n t s a t t h e A M D We b s i t e , http://www.amd.com.
  • Page 102 AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet 31994A —1 August 2004 Appendix B - Conventions and Abbreviations...

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