AMD Geode LX 600@0.7W Data Book page 177

CPU Core Register Descriptions
5.5.2.82 L1 Data TLB Entry MSR (L1DTLB_ENTRY_MSR)
MSR Address 0000189Ah
Type R/W
Reset Value 00000000_00000000h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Name
63:44 LINADDR
43:35 RSVD (RO)
34 WP
33 WA_WS
32 WC
31:12 PHYSADDR
11:7 RSVD (RO)
6 DIRTY
5 ACC
4 CD
3 WT_BR
2 US
1 WR
0 VALID
AMD Geode™ LX Processors Data Book
L1DTLB_ENTRY_MSR Register Map
LINADDR
PHYSADDR
L1DTLB_ENTRY_MSR Bit Descriptions
Description
Linear Address. Address [32:12].
Reserved (Read Only).
Write-protect Flag.
0: Page can be written.
1: Page is write-protected.
Write-allocate/Write-serialize Flag. If the page is cacheable, a 1 indicates the write-
allocate flag. If the page is non-cacheable, a 1 indicates the write-serialize flag.
Write-combine Flag. When this page is marked as non-cacheable, a 1indicates that
writes may be combined before being sent to the bus.
Physical Address. Address [32:12]
Reserved (Read Only).
Dirty Flag. A 1 indicates that the page has been written to.
Accessed Flag. A 1 indicates an entry in the TLB.
Cache Disable Flag. A 1 indicates that the page is uncacheable.
Write-through/Write-burst Flag. When the page is cacheable, a 1 indicates that the
page is write-through. When the page is non-cacheable, a 1 indicates that the page
allows write bursting.
User Access Privileges.
0: Supervisor.
1: User.
Writable Flag.
0: Page can not be written.
1: Page can be written.
Valid Bit. A 1 indicates that the entry in the TLB is valid.
33234H
RSVD
9 8 7 6 5 4 3
RSVD
2 1 0
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