AMD Geode LX 600@0.7W Data Book page 590

Processors
Table of Contents

Advertisement

33234H
6.16.2.11 GLPCI Memory Region 2 Configuration (GLPCI_R2)
MSR Address
5000201Ah
Type
R/W
Reset Value
00000000_00000000h
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit
Name
63:44
TOP
43:32
RSVD (RO)
31:12
BASE
11:9
RSVD (RO)
8
EN
7:6
RSVD (RO)
5
PF
4
WC
3
RSVD (RO)
2
WP
1
DD
0
CD
590
GLPCI_R2 Register Map
TOP
BASE
GLPCI_R2 Bit Descriptions
Description
Top of Region. 4 KB granularity, inclusive.
Reserved (Read Only). Reserved for future use.
Base of Region. 4 KB granularity, inclusive.
Reserved (Read Only). Reserved for future use.
Region Enable. Set to 1 to enable access to this region.
Reserved (Read Only). Reserved for future use.
Prefetchable. Reads to this region have no side-effects.
Write Combine. Writes to this region may be combined.
Reserved (Read Only). Reserved for future use.
Write Protect. When set to 1, only read accesses are allowed. Write accesses are
ignored (master abort).
Discard Data. When set to 1, write access are accepted and discarded. Read accesses
are ignored (master abort).
Cache Disable. When set to 1, accesses are marked as non-coherent. When cleared to
0, accesses are marked as coherent.
GeodeLink™ PCI Bridge Register Descriptions
RSVD
9
8
7
6
5
RSVD
RSVD
AMD Geode™ LX Processors Data Book
4
3
2
1
0

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents