Hardware User Guide
Table 26. HDMI Flags in IO Map Register 0x65
Bit Name
Bit Position
GAMUT_MDATA_RAW
0 (LSB)
AUDIO_C_PCKT_RAW
1
GEN_CTL_PCKT_RAW
2
HDMI_MODE_RAW
3
AUDIO_CH_MD_RAW
4
AV_MUTE_RAW
5
INTERNAL_MUTE_RAW
6
CS_DATA_VALID_RAW
7 (MSB)
Table 27. HDMI Flags in IO Map Register 0x6A
Bit Name
DE_REGEN_LCK_RAW
V_LOCKED_RAW
VIDEO_3D_RAW
TMDS_CLK_A_RAW
TMDSPLL_LCK_A_RAW
Table 28. HDMI Flags in IO Map Register 0x6F
Bit Name
CABLE_DET_A_RAW
HDMI_ENCRPT_A_RAW
Table 29. HDMI Flags in IO Map Register 0x79
Bit Name
NEW_AVI_INFO_RAW
NEW_AUDIO_INFO_RAW
NEW_SPD_INFO_RAW
NEW_MS_INFO_RAW
NEW_VS_INFO_RAW
NEW_ACP_PCKT_RAW
NEW_ISRC1_PCKT_RAW
NEW_ISRC2_PCKT_RAW
Description
Returns 1 if a Gamut Metadata packet was received. For additional information, see the Gamut
Metadata Packets section.
Returns 1 if an audio clock regeneration packet has been received. Reset to 0 following a packet
detection flag reset condition.
Returns 1 if general control packet has been received. Reset to 0 following a packet detection flag
reset condition.
Returns 1 if a HDMI stream is being received. For additional information, see the HDMI/DVI Status
Bits section.
Returns 1 if the audio channel mode is multichannel (2-, 4-, 6-, or 8-channel) audio. Reset to 0
following a packet detection flag reset condition. For additional information, see the Audio
Channel Mode section.
Returns 1 if the latest general control packet received has AV_MUTE asserted. Reset to 0 following
packet detection flag reset condition.
Returns 1 if ADV7611 has internally muted the audio data. For additional information, see the
Internal Mute Status section.
Returns 1 if channel status bit readback registers in HDMI Map, Address 0x36 to 0x3A are valid. For
additional information, see the Validity Status Flag section.
Bit Position
Description
0 (LSB)
Description available in the Primary Port Horizontal Filter Measurements
section.
1
Description available in the Primary Port Horizontal Filter Measurements
section.
2
Description availalble in the Video 3D Detection section.
6
Description available in the TMDS Clock Activity Detection section.
7
Description available in the TMDS Measurement section.
Bit Position
Description
0
Description available in the +5 V Cable Detect section.
2
Description available in the HDCP Decryption Engine section.
Bit Position
0 (LSB)
1
2
3
4
5
6
7 (MSB)
Rev. A | Page 89 of 184
UG-180
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