Analog Devices Advantiv ADV7611 Hardware User's Manual page 161

Hardware User Guide
CP_LOCK, CP_UNLOCK
CP_UNLOCK_RAW is programmable as either an edge sensitive bit or a level sensitive bit using the following control. Note that this
control also configures whether an interrupt is generated only on the rising edge of CP_UNLOCK_RAW, or on both edges.
CP_LOCK_UNLOCK_EDGE_SEL , IO, Address 0x41[5]
A control to configure the functionality of the CP_LOCK, CP_UNLOCK interrupts.
Function
CP_LOCK_UNLOCK_EDGE_SEL
0
1 (default)
CP_LOCK_ST , IO, Address 0x43[2] (Read Only)
Detailed description available in the List of Interrupt Status Registers section.
CP_UNLOCK_ST , IO, Address 0x43[3] (Read Only)
Detailed description available in the List of Interrupt Status Registers section.
HDMI Interrupts Validity Checking Process
All HDMI interrupts have a set of conditions that must be taken into account for validation in the display firmware. When the ADV7611
interrupts the display controller for an HDMI interrupt, the host must check that all validity conditions for that interrupt are met before
processing that interrupt.
For simplicity, HDMI interrupts can be subdivided into three groups, as listed in the following sections.
Group 1 HDMI Interrupts
The interrupts listed in Table 66 are valid irrespective of the mode in which the ADV7611 is configured, that is: HDMI mode
(PRIM_MODE set to values 0x05 or 0x06).
Table 66. HDMI Interrupts Group 1
Interrupts
TMDS_CLK_A
CABLE_DET_A
Group 2 HDMI Interrupts
The interrupts listed in Table 67 are valid on the condition that the ADV7611 is configured in HMDI mode.
Table 67. HDMI Interrupts Group 2
Interrupts
INTERNAL_MUTE
VIDEO_PLL_LCK
AKSV_UPDATE
Description
Generate interrupt for a low to high change in CP_LOCK,UNLOCK status for Ch1.
Generate interrupt for a low to high or a high to low change in CP_LOCK,UNLOCK status for Ch1.
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