Analog Devices Advantiv ADV7611 Hardware User's Manual page 178

UG-180 Hardware User Guide
APPENDIX A
PCB LAYOUT RECOMMENDATIONS
The ADV7611 is a high precision, high speed, mixed signal device. It is important to have a well laid out PCB board, in order to achieve
the maximum performance from the part. The following sections are a guide for designing a board using the ADV7611.
POWER SUPPLY BYPASSING
It is recommended to bypass each power supply pin with a 0.1 μF and a 10 nF capacitor where possible. The fundamental idea is to have a
bypass capacitor within about 0.5 cm of each power pin.
The bypass capacitors should be physically located between the power plane and the power pin. Current should flow from the power
plane to the capacitor to the power pin. The power connection should not be made between the capacitor and the power pin. Generally,
the best approach is to place a via underneath the 100 nF capacitor pads down to the power plane (refer to Figure 70).
VIA TO GND LAYER
AND GND PIN
10nF 0.1µF
VIA TO VDD PIN
VDD SUPPLY
Figure 70. Recommended Power Supply Decoupling
It is particularly important to maintain low noise and good stability of the PVDD (the clock generator supply). Abrupt changes in the
PVDD supply can result in similarly abrupt changes in sampling clock phase and frequency. This can be avoided by careful attention to
regulation, filtering, and bypassing. It is highly desirable to provide separate regulated or heavily filtered supplies for each of the analog
circuitry groups (CVDD, TVDD, and PVDD).
Some graphic controllers use substantially different levels of power when active (during active picture time) and when idle (during
horizontal and vertical synchronization periods). This can result in a measurable change in the voltage supplied to the analog supply
regulator, which can in turn produce changes in the regulated analog supply voltage. This can be mitigated by regulating the analog
supply, or at least PVDD, from a different, cleaner, power source, for example, from a +12 V supply.
It is also recommended to use a single ground plane for the entire board. Repeatedly, experience has shown that the noise performance is
the same or better with a single ground plane. Using multiple ground planes can be detrimental because each separate ground plane is
smaller and long ground loops can result.
In some cases, using separate ground planes is unavoidable. For those cases, it is recommended to place, at least, a single ground plane
under the ADV7611.It is important to place components wisely because the current loops are much longer when using split ground
planes as the current takes the path of least resistance.
Example of a Current Loop
Power plane → ADV7611 → digital output trace → digital data receiver→ digital ground plane → analog ground plane
DIGITAL OUTPUTS (DATA AND CLOCKS)
The trace length that the digital outputs have to drive should be minimized. Longer traces have higher capacitance, which requires more
current that can cause more internal digital noise. Shorter traces reduce the possibility of reflections.
Adding a series resistor of value between 33 Ω to 200 Ω can suppress reflections, reduce EMI, and reduce the current spikes inside the
ADV7611. If series resistors are used, they should be placed as close as possible to the ADV7611 pins and the trace impedance for these
signals should match that of the termination resistors selected.
If possible, the capacitance that each of the digital outputs drives should be limited to is less than 15 pF. This can be accomplished easily
by keeping traces short and by connecting the outputs to only one device. Loading the outputs with excessive capacitance increases the
current transients inside the ADV7611, creating more digital noise on its power supplies.
Rev. A | Page 178 of 184