Analog Devices Advantiv ADV7611 Hardware User's Manual page 173

Hardware User Guide
HDMI Edg Int Status 5 register consists of the VS_INF_CKS_ERR_ST field.
VS_INF_CKS_ERR_ST , IO, Address 0x8E[0] (Read Only)
Latched status of MPEG source InfoFrame checksum error interrupt. Once set, this bit will remain high until the interrupt is cleared via
MS_INF_CKS_ERR_CLR. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
VS_INF_CKS_ERR_ST
0 (default)
1
CEC_STATUS1_INT_STATUS register consists of fields:
•
CEC_RX_RDY2_ST
•
CEC_RX_RDY1_ST
•
CEC_RX_RDY0_ST
•
CEC_TX_RETRY_TIMEOUT_ST
•
CEC_TX_ARBITRATION_LOST_ST
•
CEC_TX_READY_ST
CEC_STATUS2_INT_STATUS register consists of the CEC_INTERRUPT_BYTE_ST[7:0] field.
CEC_INTERRUPT_BYTE_ST[7:0] , IO, Address 0x98[7:0] (Read Only)
Function
CEC_INTERRUPT_BYTE_ST[7:0]
0 (default)
1
Description
No change in VS InfoFrame checksum error
A VS InfoFrame checksum error has triggered this interrupt
Description
No change
One of the 8 opcodes received
Rev. A | Page 173 of 184
UG-180