Pci Express Interface; Pcie Express Overview; Pcie X16 Expansion - IEI Technology SPCIE-3600AM2 User Manual

Clock spread spectrum capability

2.4.2 PCI Express Interface

2.4.2.1 PCIe Express Overview

The NVIDIA MCP55Pro PCIe bus is compliant with the PCI Express 1.1a Specifications.
The PCIe bus supports 2.5 GHz data transfers with a total transmission rate of 2.5 Gbps
per direction per lane. There are a total of 28 PCIe lanes that can be configured in the
following way
x16, x8, x1, x1, x1, x1
x16, x8, x4
x16, x8, x4, x2, x2
x8, x8, x4, x4, x4
x8, x8, x8, x4
x8, x4, x4, x4, x4, x4
Twenty PCIe lanes are interfaced to the backplane through the standard PCIe x16 and
PCIe x4 edge connector on the bottom of the board. The remaining eight lanes are
interfaced from a PCIe x8 slot connector on the SPCIE-3600AM2 to a corresponding PCIe
x8 slot connector on the backplane with a specially designed separately purchased PCIe
cable.

2.4.2.2 PCIe x16 Expansion

The PICMG 1.3 form factor specification requires that 16 PCIe lanes are interfaced to the
backplane through a standard edge connector on the bottom of the CPU card. The
SPCIE-3600AM2 PCIe x16 edge connector is shown in Figure 2-6 below.
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SPCIE-3600AM2 PICMG 1.3 CPU Card