Ide Interface Controller - IEI Technology SPCIE-3600AM2 User Manual

Full-size amd socket am2 picmg 1.3 cpu card supports opteron, athlon 64 x2, athlon 64 and sempron processors, 28 pcie expansion lanes, dual gbe, six sata 2.0, ten usb 2.0 and crt output
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functions:
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256 raster operations
o
Rectangle fill
o
Color expansion
o
Enhanced color expansion
o
Line-drawing with styled pattern
o
Built-in bytes pattern registers
o
Built-in 8x8 mask registers
o
Rectangle clipping
o
Transparent BitBlt with source and destination keys
Source data in command queue Bitblt
Supports memory-mapped, zero wait-state, burst engine write
Built-in 64x64x2 bit-mapped mono hardware cursor
Maximum 256MB frame buffer with linear addressing
Built-in source read-buffer to minimize engine wait-state
Built-in destination read-buffer to minimize engine wait-state

2.4.4 IDE Interface Controller

The IDE controller on the NVIDIA MCP55Pro is interfaced to a single 40-pin IDE
connector on the SPCIE-3600AM2 and connects to two HDD. The IDE controller
specifications are listed below.
5V-tolerant interface with support for two devices (master and slave)
Industry-standard PCI bus master IDE (BM-IDE) register set compliant with
Microsoft BM-IDE drivers
Supports Ultra DMA modes 6–0 (UltraDMA-133/100/66/33)
Supports standard PIO modes 4-0
Supports standard DMA modes 2-0
Supports scatter-gather function
The IDE connector is shown in Figure 2-10 below.
Page 18
SPCIE-3600AM2 PICMG 1.3 CPU Card

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