UG-438
TMDS_CLK_A_RAW, IO, Address 0x6A[4] (Read Only)
Raw status of Port A TMDS clock detection signal.
Function
TMDS_CLK_A_RAW
0 (default)
1
Important
•
The clock detection flag is valid if the part is powered up or in Power Down Mode 1. Refer to the
•
The clock detection flags is valid, irrespective of the mode the part is set into via the PRIM_MODE[3:0] register.
Clock and Data Termination Control
The
ADV7610
provides controls for the TMDS clock and data termination on the HDMI port.
Note: The clock termination of the port by
This part does not support HDMI streams with a clock lower than 25 MHz.
TERM_AUTO, Addr 68 (HDMI), Address 0x01[0]
This bit allows the user to select automatic or manual control of clock termination. If automatic mode termination is enabled, then the
termination on the port selected via HDMI_PORT_SELECT[1:0] is enabled.
Function
TERM_AUTO
0 (default)
1
Note: When manual mode is enabled, the termination for each port is set individually by the CLOCK_TERMA_DISABLE control bits
CLOCK_TERMA_DISABLE, Addr 68 (HDMI), Address 0x83[0]
Disable clock termination on Port A. Can be used when TERM_AUTO set to 0
Function
CLOCK_TERMA_DISABLE
0
1 (default)
HDMI/DVI STATUS BITS
HDMI/DVI status mode is available through HDMI_MODE.
HDMI_MODE_RAW, Addr 68 (HDMI), Address 0x65[3] (Read Only)
Raw status signal of HDMI mode signal.
Function
HDMI_MODE_RAW
0 (default)
1
HDMI_MODE, Addr 68 (HDMI), Address 0x05[7] (Read Only)
A readback to indicate whether the stream processed by the HDMI core is a DVI or an HDMI stream.
Function
HDMI_MODE
0 (default)
1
VIDEO 3D DETECTION
Status of 3D video is available through the VIDEO_3D_RAW bit.
VIDEO_3D_RAW, Addr 68 (HDMI), Address 0x6A[2] (Read Only)
Raw status of the video 3D signal.
Description
No TMDS clock detected on Port A
TMDS clock detected on Port A
HDMI_PORT_SELECT[2:0]
Description
Disable termination automatic control
Enable termination automatic control
Description
Enable Termination Port A
Disable Termination Port A
Description
DVI mode detected
HDMI mode detected
Description
DVI mode detected
HDMI mode detected
Rev. 0 | Page 32 of 184
must always be enabled.
Hardware User Guide
Power-Down Mode 1
section.
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