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BUS DEFINITION
Front Side
No.
SYMBOL
29
A5
30
A4
31
A3
32
A15
33
A12
34
A9
35
DO
36
DOO
37
A10
38
D04
39
D05
40
D06
41
D12
42
D13
43
Dl7
44
SMI
45
SOUT
NAME
Address Line #5
Address Line #4
Address Line #3
Address Line #15
Address Line #12
Address Line #9
Data Out Line #1
Data Out Line #0
Address Line #10
Data Out Line #4
Data Out Line #5
Data Out Line #6
Data In Line #2
Data In Line #3
Data In Line #7
Ml
OUT
Mother Board
User Guide
FUNCTION
Status output signal
that indicates that
the processor is in
the fetch cycle for
the first byte of an
instruction
Status output signal
which indicates that
the address bus con
tains the address of
an output device and
the data bus will con
tain the output data
when PWR is active
2
13
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