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W h e n i n t e r r u p t s a r e i n i t i a l l y e n a b l e d i n a s y s t e m ,
c u r r e n t p r i o r i t y s t a t u s r e g i s t e r s h o u l d a l s o b e i n i t i a l i z e d
t o i n s u r e t h a t t h e i n t e r r u p t g e n e r a t i n g s y s t e m w i l l
r e s p o n d t o a n i n t e r r u p t .
It should be noted that the current priority status register
inputs data bits 0, 1, and 2, are input in the complement
form.
Further information on the operation of the 8214
priority interrupt and coding can be located in the Intel
Data Book.
The program controlled clock's functions are selected by
both user jumpers and software.
installed in the interval selection and priority select
sockets, writing to the PIC-8's output port address can
enable the clock circuitry.
the user-selected intervals.
In normal use, only one interval will be selected at a
time; thus, only one of the three bits, 4, 5, and 6 in the
output port will be 1 at a given time.
of these bits are written 1 at the same time, then the
different rates will interact and interrupts will not
occur continuously at the highest rate, but will occur
at the highest rate for only portions of the time and not
at all during other portions of the time as determined by
the specific rates selected.
rates 1 millisecond and 1 second are selected at the same
time, one millisecond interrupts will be received for
1/2 of one second and then no interrupts will be received
for the second half of that second and this pattern will
repeat every second.
Should an interval interrupt not be acted upon in the time
remaining between it's occurrence and the occurrence of
the following interval interrupt request, the interrupt
request will be taken away at the following pulse, and
the request will again- be asserted on the second interval
following the first.
interrupt every other interval will continue until-the
system is able to respond to the interrupts within the time
period required.
Whenever a byte is output to select or change the selection
of the interrupt interval, it must be remembered that the
lower 4 bits of the same output byte affect the interrupt
generating circuitry, and will set it so that it is ready
to respond to the next interrupt.
the current priority status register, must be present in
the output bytes lower 4 bits every time a bit is output
1 n
A
1
User Guide
After jumpers have been
Data bits 4, 5, and 6 control
For example, if both the
This pattern of requesting an
The desired value for
P I C - 8
Revision 3
t h e
If two or more
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