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The DS2 input (to complete selection on the 8212} is con
trolled by bit 7 of the control register, thus providing the
required multiplexing.
Serial I/O Port
The serial I/O port is implemented using a universal asyn
chronous receiver/transmitter chip (UART). ; The UART is
designed to add the start and stop bits required for trans
mitting data and to recognize these start and stop bits when
receiving data". ' Note that the jumper configuration for the
UART. consists o f putting +V (Vcc through a IK resistor) on •
the control load pin and either ground or + V on the other
select pins.
The setting of the options pins is discussed
in the MIO User Guide.
Parallel I/O Ports
PIO Output Ports
The two parallel input and output ports use the 8212
chips for holding and receiving data.
the most significant bit of the control register is used
to determine whether port 1 or port 2 is selected yia.;
the DS2 select input pin.
cuted, the data is loaded during /PWR.
selected on the trailing edge of /PWR which causes the
interrupt line (Pin 23) to go high on the 8212.
signal is used as a DATA READY output signal for the port.
When the output system has accepted the data, it responds
by sending a positive pulse (CLEAR OUTPUT DATA READY) on
the strobe input.
8212 to be cleared thus indicating that the external inter
face is ready for more parallel data.
PIO Input Ports
The strobe input from the external device first goes
through an EXCLUSIVE OR gate.
is used to sense a positive strobe, while the absence of
a jumper is used for a negative strobe.
shots are triggered on the high-to-low transition on
the output of the 74LS86,sI
selects the input strobe, or the LOAD one shot, to gate
the data into the 3212 and to set the interrupt line
(Pin 23) low thus indicating that input data is ready.
If no jumper is used, the input data is continuously
available to the 8080.
by the computer, the 8212 being selected will cause the
interrupt line to reset, indicating to the external sys
t e m
that the data has been accepted, and removing the
ready pulse internally.
When the REGISTER LOAD is exe
This causes the interrupt line in the
A jumper to this gate
The second jumper area
When the 8212 register is read
MIO
Theory of. Operation
Note again that
The 8212 is de
This
The LOAD one
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