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IMS IMSAI 8080 User Manual page 409

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Data Ready (DR) is available at CRL IJA.
Clear Data Ready (CDR) is available at
the PIO connector.
Data Strobe (STB) is available at the
PIO connector.
2.
Input data is accepted from the PIO
connector.
Input Data Strobe (IDS) is jumper-selec­
table for positive or negative edge
triggering, gating or disable.
Input Data Accepted (IDA) is available
at the PIO connector. .
Input Data Ready is available at CTL IJA.
C)
CTL
1.
Bits 0-3 are latched and available in OJA.
Bit 4 = write enable for CRI
Bit 5 = read enable for CRI
Bits 6 and 7 are used to control the gener­
ation of SIOS, PIOS, CRIS and PIO port
selection.
2.
Output Jumper Area (OJA) has CTL bits 0-3
and SIO transmit as inputs and has the
following possible outputs:
Four EIA drivers
One current loop driver (20 or 60 milliamp)
Two TTL drivers
Three open collector 20 milliamp, 40
volt drivers
3.
Input Jumper Area (IJA) has output jumper
positions to eight data input lines, eight
interrupt request lines and the serial data
input, and has as input the SIO, PIO and
CRI status signals, as well as, four EIA
and one current loop receiver.
D)
CRI
The CRI is capable of writing or reading
biphase encoded data at rates of 500 to
62,500 bits per second.
in either the "Byte/Lancaster" or "Tarbell"
recording standards.
rates for "Byte/Lancaster" and "Tarbell"
operation are 2400 bps and 1500 bps, re­
spectively.)
byte basis.
put connections for cassette interface, al­
though only one input may be operating at a
given time.
MIO
Specifications
It can operate
(Note: the standard
The CRI can interrupt on a bit
It has two input and two out­

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