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BUS DEFINITION
Front Side
No.
SYMBOL
5
Vll
6
V12
7
V13
8
VI4
9
V15
10
V16
11
V17
12
to
UNUSED
17
18
STATUS DSBL
19
CC DSB
20
UNPROT
21
SS
NAME
Interrupt
Vectored
Line # 1
Vectored
Interrupt
Line #2
Vectored
Interrupt
Line #3
Vectored
Interrupt
Line #4
Vectored
Interrupt
Line #5
Vectored
Interrupt
Line #6
Vectored
Interrupt
Line #7
STATUS DISABLE
COMMAND CONTROL
D I S A B L E
UNPROTECT
SINGLE STEP
Mother Board
User Guide
F U N C T I O N
Allows the buffers
for the 8 status
lines to be tri-
stated
Allows the buffers
for the 6 output
command/control lines
to be tri-stated
Reserved for input
to the memory pro
tect flip-flop on a
given memory board
Used by Front Panel
to disable input buf
fer while panel drives
bidirectional data
bus
2 - 1 1
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