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.SER
GUIDE
The basic purpose of the PI06 Board is to provide the microprocessor
with two programmable 24 line parallel I/O ports and to extend a fully
buffered microprocessor I/O interface to a peripheral device.
The address of the PI06 Board is jumpered using the "Address Jumper
Select" headers in locations C6 and B7.
in Figure One.
contains the four high order address bits.
„high, the odd numbered pin on the left must be jumpered to the
Iflcorresponding pin on the right.
fF^Figure One represent an address o f :
|||
l i t
*.In the low order half of the address, bits 2 and 3 are selected by
location B7.
7, 8, 9, 10, 11, and 12.
CARE" bits by jumpering pin 3 to 14 or 4 to 13 respectively.
When addressing the 8255's bit 3 must be low.
J255-l*and bit 2 low addresses 8255-0.
'or addressing the particular functions within a given 8255.
example, when writing to an 8255 with address bits 0 and 1 both
high, this causes the 8255 to interpret the incoming data byte as
a control word.
T W o .
The 8255's operate completely independent of one another.
functional configuration of the 8255's is under program control by
the software residing in the microprocessor.
output to an 8255 setting up a desired functional configuration, while
other I/O commands operate on the particular configuration.
to the Intel 8080 Microcomputer Systems User's Manual for the details
of operation of the 8255's.
Connectors J2 and J3 contain all the signals necessary for operation
of and interfacing the 8255's to peripheral devices.
J3 are 50 pin edge connectors which accept a 3M type flat cable edge
connector.
Table One is a list and description of the signals
contained in connectors J2 and J3
By using either J2 or J3 combined with J4, the microprocessor 1/0
bus can be extended to a peripheral device so the user may implement
I/O logic direct from the microprocessor.
^nd "Memory Mapped I/O" techniques may be utilized.
I/O" technique utilizes input and output commands between a particular
.ddress port and the A register.
to use any memory reference instruction for 1/0.
The address byte is divided in half.
A7
n
These bits can be jumpered as above using pins 5, 6,
Bits 2 and/or 3 can be jumpered as "DON't
A summary of the address scheme is shown in Figure
PI06
User
Revision O
These sockets are also shown
To make an address bit
For example, the dotted lines in
A5
A6
1
0
Bit 2 high, addresses
Address bits 0 and 1 are used
A control word is
(see PI06 Theory of Operation).
Both Intel's "Isolated I/O"
"Memory Mapped I/O" allows the user
Guide
Location C6
A4
1
For
The
Refer
Both J2 and
The "Isolated
It treats I/O ports
3
27
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