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Pin #
20
21
GROUND
22
READY
23
SYNC
24
GROUND
25
02
26
GROUND
3
8
Name
INP
Buffered status output signal from the
microprocessor which indicates that the
address bus contains the address of an
input device and the input data should
be placed on the data bus when "PDBIN"
is active.
Buffered "PRDY" signal to the micro
processor.
input that controls the RUN state of
the processor.
low, the processor will enter a WAIT
state until the line is released.
Buffered "PSYNC" from the microprocessor.
Processor command/control output indi
cating the beginning of each machine
cycle.
Buffered phase 2 clock from the micro
processor.
n u D
Theory of Operation
TABLE 2
Description
Processor command/control
If the line is pulled
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