Auxiliary Power Control - Renesas IDT 89HPES4T4 User Manual

Pci express switch
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IDT Power Management
Notes
PES4T4 User Manual
In Device OFF state, both main power and the auxiliary power is off.
The device enters Inactive Standby when the auxiliary power is applied and Main Power is Off. When
main power is applied the device enters the Device ON state. As shown in Figure 7.3, when main power is
applied for the first time after auxiliary power is switched ON, the external POR circuitry is required to assert
PERSTN and sequence the APWRDISN signal with respect to PERSTN . The internal logic utilizes this
external POR driven sequence to build a capability to determine whether switch was in L2 state or not at the
time of application of fundamental reset.
If the APWRDISN signal is low after 8 clock cycles from de-assertion of PERSTN then it implies that the
device was not in L2 state when fundamental reset was applied. All the FRSticky bits are initialized in this
case. If APWRDISN signal is high after 8 clock cycles from de-assertion of PERSTN then all the FRSticky
bits are preserved.
The state of APWRDISN signal after 256 clocks of de-assertion of PERSTN is used to initialize the
APWREN bit in the switch control register. If the signal is low, APWREN bit is '0' indicating that the L2 mode
has been disabled. Otherwise, APWREN bit is set.
The PME Enable bit controls the ability of the device to raise PME events from D3cold state . Only
devices that are enabled to generate PME events from D3cold are allowed to utilize auxiliary power supply.
The auxiliary power can be used only if the Auxiliary Power Detected (AUXPD) bit is set in the PCI
Express Device Status register. The Auxiliary Power Enable bit (APWREN) in the Switch Control (SWCTL)
register controls setting or resetting of this bit as described in section section Auxiliary Power Control on
page 7-6 . The L2 mode is enabled only when both AUXPD bit in PCIESTS and PMEE bit PMCSR register
are set. If L2 mode is enabled and main power is removed, the switch enters Active Standby.
When the main power rail is switched OFF and auxiliary power rail is ON then the switch can enter
Active or Inactive standby depending upon whether auxiliary power is enabled. If the auxiliary power is
enabled then the switch enters Active standby and all the FRSticky register bits are saved along with
powering ON of the internal Wake and Beacon sensing and generation logic. Otherwise, the device enters
InActive standby and the FRSticky register bits are not saved. The internal Wake and Beacon logic is not
powered ON in this state.
The normal configuration register fields (RW, RO, etc.) are set to the initial value as a result of any type
of reset. The Sticky and RWL fields are preserved across hot and secondary bus resets. The FRSticky
fields are preserved across all resets (hot, warm, cold). The FRSticky fields are reset when main power is
applied for the first time after auxiliary power is turned ON as shown in Figure 7.3.

Auxiliary Power Control

The PES4T4 supports the Auxiliary Power Disable (APWRDISN) input pin that is used to enable/disable
the Auxiliary Power Usage.
7 - 6
February 1, 2011

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