Pin Description - Renesas IDT 89HPES4T4 User Manual

Pci express switch
Table of Contents

Advertisement

IDT PES4T4 Device Overview
Notes
PES4T4 User Manual

Pin Description

The following tables lists the functions of the pins provided on the PES4T4. Some of the functions listed
may be multiplexed onto the same pin. The active polarity of a signal is defined using a suffix. Signals
ending with an "N" are defined as being active, or asserted, when at a logic zero (low) level. All other signals
(including clocks, buses, and select lines) will be interpreted as being active, or asserted, when at a logic
one (high) level.
Signal
Type
PE0RP[0]
I
PE0RN[0]
PE0TP[0]
O
PE0TN[0]
PE2RP[0]
I
PE2RN[0]
PE2TP[0]
O
PE2TN[0]
PE3RP[0]
I
PE3RN[0]
PE3TP[0]
O
PE3TN[0]
PE4RP[0]
I
PE4RN[0]
PE4TP[0]
O
PE4TN[0]
PEREFCLKP
I
PEREFCLKN
Signal
Type
MSMBCLK
I/O
MSMBDAT
I/O
Name/Description
PCI Express Port 0 Serial Data Receive. Differential PCI Express receive
pair for port 0.
PCI Express Port 0 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 0.
PCI Express Port 2 Serial Data Receive. Differential PCI Express receive
pair for port 2.
PCI Express Port 2 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 2.
PCI Express Port 3 Serial Data Receive. Differential PCI Express receive
pair for port 3.
PCI Express Port 3 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 3.
PCI Express Port 4 Serial Data Receive. Differential PCI Express receive
pair for port 4.
PCI Express Port 4 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 4.
PCI Express Reference Clock. Differential reference clock pair input. This
clock is used as the reference clock by on-chip PLLs to generate the clocks
required for the system logic and on-chip SerDes.
Table 1.1 PCI Express Interface Pins
Name/Description
Master SMBus Clock. This bidirectional signal is used to synchronize
transfers on the master SMBus.
Master SMBus Data. This bidirectional signal is used for data on the mas-
ter SMBus.
Table 1.2 SMBus Interface Pins
1 - 4
February 1, 2011

Advertisement

Table of Contents
loading

Table of Contents