Use Of Hypertext; Reference Documents; Revision History - Renesas IDT 89HPES4T4 User Manual

IDT
Notes
PES4T4 User Manual
Type Abbreviation
Read and Write when
Unlocked
Read Only Sticky
Read and Write Sticky
Read Write-1-to-Clear
Sticky
Write Transient
Zero

Use of Hypertext

In Chapter 9, Tables 9.2 and 9.3 contain register names and page numbers highlighted in blue under the
Register Definition column. In pdf files, users can jump from this source table directly to the registers by
clicking on the register name in the source table. Each register name in the table is linked directly to the
appropriate register in the register section of the chapter. To return to the source table after having jumped
to the register section, click on the same register name (in blue) in the register section.

Reference Documents

PCI Express Base Specification, Revision 1.1, PCI Special Interest Group.
PCI Power Management Interface Specification, Revision 1.2, PCI Special Interest Group.
PCI to PCI Bridge Architecture Specification, Revision 1.2, PCI Special Interest Group.
SMBus Specification, Revision 2.0.

Revision History

June 20, 2007: Initial Publication.
July 11, 2007: Corrected AERUCS to AERUES in AERCTL register, Chapter 8.
RWL Software can read the register/bits with this attribute. Writing to
register/bits with this attribute will only cause the value to be
modified if the REGUNLOCK bit in the SWCNTL register is set.
When the REGUNLOCK bit is cleared, writes are ignored and
the register/bits are effectively read-only.
These registers are Sticky as they are preserved across a hot
reset. These bits are not preserved during fundamental reset.
ROS Registers are read-only and cannot be altered by software. Reg-
isters are not initialized or modified by hot reset.
When device consumes AUX power, some of these bits main-
tain their value across fundamental reset and are marked
FRSticky.
RWS Registers are read-write and may be either set or cleared by
software to the desired state. Bits are not initialized or modified
by hot reset.
When device consumes AUX power, some of these bits main-
tain their value across fundamental reset and are marked
FRSticky.
RWICS Registers indicate status when read, a set bit indicating a status
event may be cleared by writing a 1. Writing a 0 to RW1CS bits
has no effect. Bits are not initialized or modified by hot reset.
When device consumes AUX power, some of these bits main-
tain their value across fundamental reset and are marked
FRSticky.
WT The zero is always read from a bit/field of this type. Writing of a
one is used to qualify the writing of other bits/fields in the same
register.
Zero A zero register or bit must be written with a value of zero and
returns a value of zero when read.
Table 3 Register Terminology (Sheet 2 of 2)
4
Description
February 1, 2011