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8.4 Registers to Control 8-Bit Timer/Event Counters 50 and 51
The following three types of registers are used to control 8-bit timer/event counters 50 and 51.
• Timer clock select register 5n (TCL5n)
• 8-bit timer mode control register 5n (TMC5n)
• Port mode register 3 (PM3)
Remark n = 0, 1
(1) Timer clock select register 5n (TCL5n: n = 0, 1)
This register sets the count clock of 8-bit timer/event counter 5n and the valid edge of the TI5n input.
TCL5n is set by an 8-bit memory manipulation instruction.
RESET input sets the value of this register to 00H.
Figure 8-3. Format of Timer Clock Select Register 50 (TCL50)
Address: FF71H
After reset: 00H
Symbol
7
TCL50
0
TCL502
0
0
0
0
1
1
1
1
Cautions 1. When rewriting TCL50 to other data, stop the timer operation beforehand.
2. Be sure to set bits 3 to 7 to 0.
Remarks 1. f
: Main system clock oscillation frequency
X
2. Figures in parentheses are for operation with f
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50, 51
R/W
6
5
4
0
0
0
TCL501
TCL500
0
0
TI50 falling edge
0
1
TI50 rising edge
1
0
f
(10 MHz)
X
2
1
1
f
/2
X
4
0
0
f
/2
X
6
0
1
f
/2
X
8
1
0
f
/2
X
10
1
1
f
/2
X
User's Manual U15798EJ2V0UD
3
2
0
TCL502
Count clock selection
(2.5 MHz)
(625 kHz)
(156 kHz)
(39.1 kHz)
(9.77 kHz)
= 10 MHz
X
1
0
TCL501
TCL500
191
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