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Figure 16-5. Format of Baud Rate Generator Control Register 0 (BRGC0)
Address: FFA2H After reset: 00H
Symbol
7
BRGC0
0
TPS02
0
0
0
0
1
1
1
1
MDL03
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Caution Writing to BRGC0 during a communication operation may cause abnormal output from the baud
rate generator and disable further communication operations. Therefore, do not write to BRGC0
during a communication operation.
Remarks 1. f
:
Main system clock oscillation frequency
X
2. f
: Source clock for 5-bit counter
SCK
Value set via TPS00 to TPS02 (1 ≤ n ≤ 7)
3. n:
Value set via MDL00 to MDL03 (0 ≤ k ≤ 14)
4. k:
5. Baud rate calculation
[Baud rate] =
292
CHAPTER 16 SERIAL INTERFACE UART0
R/W
6
5
4
TPS02
TPS01
TPS00
TPS01
TPS00
0
0
Setting prohibited
0
1
f
/2
X
2
1
0
f
/2
X
3
1
1
f
/2
X
4
0
0
f
/2
X
5
0
1
f
/2
X
6
1
0
f
/2
X
7
1
1
f
/2
X
MDL02
MDL01
MDL00
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
f
X
[Hz]
n+1
2
(k + 16)
User's Manual U15798EJ2V0UD
3
2
MDL03
MDL02
Source clock selection for 5-bit counter
Output clock selection for baud rate generator
f
/16
SCK
f
/17
SCK
f
/18
SCK
f
/19
SCK
f
/20
SCK
f
/21
SCK
f
/22
SCK
f
/23
SCK
f
/24
SCK
f
/25
SCK
f
/26
SCK
f
/27
SCK
f
/28
SCK
f
/29
SCK
f
/30
SCK
Setting prohibited
1
0
MDL01
MDL00
n
—
1
2
3
4
5
6
7
k
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
—
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