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C.1 Register Name Index
[A]
A/D conversion result register 0 (ADCR0) .......................................................................................................... 245
A/D conversion result register 1 (ADCR1) .......................................................................................................... 224
A/D converter mode register 0 (ADM0) ...................................................................................................... 226, 246
Analog input channel specification register 0 (ADS0) ............................................................................... 229, 249
Asynchronous serial interface mode register 0 (ASIM0) .................................................................................... 289
Asynchronous serial interface status register 0 (ASIS0) .................................................................................... 291
[B]
Baud rate generator control register 0 (BRGC0) ................................................................................................ 291
[C]
Capture/compare control register 0 (CRC0) ....................................................................................................... 133
Carrier generator output control register B0 (TCAB0) ........................................................................................ 165
Clock output select register (CKS) ...................................................................................................................... 219
Correction address register 0 (CORAD0) ........................................................................................................... 420
Correction address register 1 (CORAD1) ........................................................................................................... 420
Correction control register (CORCN) .................................................................................................................. 421
[E]
8-bit compare register A0 (CRA0) ....................................................................................................................... 160
8-bit compare register B0 (CRB0) ....................................................................................................................... 160
8-bit H width compare register B0 (CRHB0) ....................................................................................................... 160
8-bit timer compare register 50 (CR50) .............................................................................................................. 190
8-bit timer compare register 51 (CR51) .............................................................................................................. 190
8-bit timer counter 50 (TM50) .............................................................................................................................. 190
8-bit timer counter 51 (TM51) .............................................................................................................................. 190
8-bit timer counter A0 (TMA0) ............................................................................................................................. 161
8-bit timer counter B0 (TMB0) ............................................................................................................................. 161
8-bit timer mode control register 50 (TMC50) ..................................................................................................... 192
8-bit timer mode control register 51 (TMC51) ..................................................................................................... 192
8-bit timer mode control register A0 (TMCA0) .................................................................................................... 163
8-bit timer mode control register B0 (TMCB0) .................................................................................................... 164
External interrupt falling edge enable register (EGN) ........................................................................................ 394
External interrupt rising edge enable register (EGP) ......................................................................................... 394
[I]
IIC control register 0 (IICC0) ................................................................................................................................ 310
IIC function expansion register 0 (IICX0) ............................................................................................................ 318
IIC shift register 0 (IIC0) ...................................................................................................................................... 309
IIC status register 0 (IICS0) ................................................................................................................................. 314
IIC transfer clock select register 0 (IICCL0) ....................................................................................................... 317
496
APPENDIX C REGISTER INDEX
User's Manual U15798EJ2V0UD
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