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CHAPTER 17 SERIAL INTERFACE IIC0 ( µ PD780344Y, 780354Y SUBSERIES ONLY)
STD0
0
Start condition was not detected.
1
Start condition was detected. This indicates that the address transfer period is in effect.
Condition for clearing (STD0 = 0)
• When a stop condition is detected
• At the rising edge of the next byte's first clock
following address transfer
• Cleared by LREL0 = 1
• When IICE0 changes from 1 to 0
• When RESET is input
SPD0
0
Stop condition was not detected.
1
Stop condition was detected. The master device's communication was terminated and the bus was
released.
Condition for clearing (SPD0 = 0)
• At the rising edge of the address transfer byte's
first clock following setting of this bit and
detection of a start condition
• When IICE0 changes from 1 to 0
• When RESET is input
Remark LREL0: Bit 6 of IIC control register 0 (IICC0)
IICE0:
Bit 7 of IIC control register 0 (IICC0)
316
Figure 17-4. Format of IIC Status Register 0 (IICS0) (3/3)
User's Manual U15798EJ2V0UD
Detection of start condition
Condition for setting (STD0 = 1)
• When a start condition is detected
Detection of stop condition
Condition for setting (SPD0 = 1)
• When a stop condition is detected
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