Table of Contents
Advertisement
Figure No.
2-1
Pin I/O Circuit List ................................................................................................................................
Memory Map ( µ PD780343, 780353, 780343Y, 780353Y) ...................................................................
3-1
Memory Map ( µ PD780344, 780354, 780344Y, 780354Y) ...................................................................
3-2
Memory Map ( µ PD78F0354, 78F0354Y) .............................................................................................
3-3
3-4
Correspondence Between Data Memory and Addressing
( µ PD780343, 780353, 780343Y, 780353Y) .........................................................................................
3-5
Correspondence Between Data Memory and Addressing
( µ PD780344, 780354, 780344Y, 780354Y) .........................................................................................
Correspondence Between Data Memory and Addressing ( µ PD78F0354, 78F0354Y) .......................
3-6
3-7
Program Counter Format .....................................................................................................................
3-8
Program Status Word Format ..............................................................................................................
3-9
Stack Pointer Format ...........................................................................................................................
3-10
Data To Be Saved to Stack Memory ....................................................................................................
3-11
Data To Be Restored from Stack Memory ...........................................................................................
3-12
General-Purpose Register Configuration .............................................................................................
4-1
Port Types ............................................................................................................................................
4-2
Block Diagram of P00 to P04 ...............................................................................................................
4-3
Block Diagram of P05 to P07 ...............................................................................................................
4-4
Block Diagram of P10 to P17 ...............................................................................................................
4-5
Block Diagram of P20, P23, P26 .........................................................................................................
4-6
Block Diagram of P21, P24, P27 .........................................................................................................
4-7
Block Diagram of P22, P25 ..................................................................................................................
4-8
Block Diagram of P30, P31 ..................................................................................................................
4-9
Block Diagram of P32 to P34 ...............................................................................................................
4-10
Block Diagram of P35 ..........................................................................................................................
4-11
Block Diagram of P40 to P43 ............................................................................................................... 100
4-12
Block Diagram of Falling Edge Detector .............................................................................................. 100
4-13
Block Diagram of P70 to P73 ............................................................................................................... 101
4-14
Block Diagram of P80 to P87 ............................................................................................................... 102
4-15
Block Diagram of P90 to P97 ............................................................................................................... 103
4-16
Block Diagram of P100 to P107 ........................................................................................................... 104
4-17
Block Diagram of P110 to P113 ........................................................................................................... 105
4-18
Format of Port Mode Registers (PM0, PM2 to PM4, PM7 to PM11) ................................................... 107
4-19
Format of Pull-Up Resistor Option Registers (PU0, PU2 to PU4) ....................................................... 108
4-20
Format of Memory Expansion Mode Register (MEM) ......................................................................... 109
4-21
Format of Pin Function Switching Registers (PF8 to PF11) ................................................................ 110
5-1
Clock Generator Block Diagram ........................................................................................................... 114
5-2
Subsystem Clock Feedback Resistor .................................................................................................. 115
5-3
Format of Processor Clock Control Register (PCC) ............................................................................ 116
5-4
Format of Subclock Select Register ..................................................................................................... 117
5-5
External Circuit of Main System Clock Oscillator ................................................................................. 118
LIST OF FIGURES (1/8)
Title
User's Manual U15798EJ2V0UD
Page
54
57
58
59
62
63
64
65
65
66
67
68
69
87
90
91
92
93
94
95
97
98
99
19
Advertisement
Table of Contents
