Nesting Processing - NEC mPD780344 Series User Manual

19.4.4 Nesting processing

Nesting occurs when an interrupt request is acknowledged during execution of another interrupt.
Nesting does not occur unless the interrupt request acknowledge enable state is selected (IE = 1) (except non-
maskable interrupts). Also, when an interrupt request is acknowledged, interrupt request acknowledgment becomes
disabled (IE = 0). Therefore, to enable nesting, it is necessary to set (1) the IE flag with the EI instruction during interrupt
servicing to enable interrupt acknowledgment.
Moreover, even if interrupts are enabled, nesting may not be enabled, this being subject to interrupt priority control.
Two types of priority control are available: default priority control and programmable priority control. Programmable
priority control is used for nesting.
In the interrupt enable state, if an interrupt request with a priority equal to or higher than that of the interrupt currently
being serviced is generated, it is acknowledged for nesting. If an interrupt with a priority lower than that of the interrupt
currently being serviced is generated during interrupt servicing, it is not acknowledged for nesting.
Interrupt requests that are not enabled because of the interrupt disable state or they have a lower priority are held
pending. When servicing of the current interrupt ends, the pending interrupt request is acknowledged following
execution of at least one main processing instruction execution.
Nesting is not possible during non-maskable interrupt servicing.
Table 19-4 shows interrupt requests enabled for nesting and Figure 19-13 shows nesting examples.
Table 19-4. Interrupt Request Enabled for Nesting During Interrupt Servicing
Nesting Request
Interrupt Being Serviced
Non-maskable interrupt
Maskable interrupt ISP = 0
ISP = 1
Software interrupt
Remarks 1. : Nesting enabled
2. ×: Nesting disabled
3. ISP and IE are flags contained in PSW.
ISP = 0: An interrupt with higher priority is being serviced.
ISP = 1: No interrupt request has been acknowledged, or an interrupt with a lower priority is being
IE = 0:
IE = 1:
4. PR is a flag contained in PR0L, PR0H, and PR1L.
PR = 0: Higher priority level
PR = 1: Lower priority level
402
CHAPTER 19 INTERRUPT FUNCTIONS
Non-Maskable
Interrupt Request
×
serviced.
Interrupt request acknowledge is disabled.
Interrupt request acknowledge is enabled.
User's Manual U15798EJ2V0UD
Maskable Interrupt Request
PR = 0
IE = 1 IE = 0 IE = 1
× × ×
× ×
×
×
Software
Interrupt
PR = 1
Request
IE = 0
×
×
×
×