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CHAPTER 17 SERIAL INTERFACE IIC0 ( µ PD780344Y, 780354Y SUBSERIES ONLY)
Program processing
Hardware processing
SCL0
1
2
3
SDA0
Remark IIC0:
IIC shift register 0
STT0: Bit 1 of IIC control register 0 (IICC0)
STD0: Bit 1 of IIC status register 0 (IICS0)
SPD0: Bit 0 of IIC status register 0 (IICS0)
Communication reservations are accepted at the following timing. After bit 1 (STD0) of IIC status register 0 (IICS0)
is set to 1, a communication reservation can be made by setting bit 1 (STT0) of IIC control register 0 (IICC0) to 1
before a stop condition is detected.
Figure 17-17. Timing for Accepting Communication Reservations
SCL0
SDA0
STD0
SPD0
Figure 17-18 shows the communication reservation protocol.
Figure 17-16. Communication Reservation Timing
STT0 = 1
Communi-
cation
reservation
4
5
6
7
8
Standby mode
User's Manual U15798EJ2V0UD
Write to
IIC0
Set SPD0
Set
and INTIIC0
STD0
9
1
Output by master with bus access
2
3
4
5
6
349
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