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Figure No.
13-12
Full-Scale Error .................................................................................................................................... 257
13-13
Integral Linearity Error ......................................................................................................................... 257
13-14
Differential Linearity Error .................................................................................................................... 257
13-15
Example of Series Resistor String Circuit Configuration ..................................................................... 259
13-16
Analog Input Pin Connection ............................................................................................................... 260
13-17
A/D Conversion End Interrupt Request Generation Timing ................................................................. 261
13-18
Timing of Reading Conversion Result (When Conversion Result Is Undefined) .................................
13-19
Timing of Reading Conversion Result (When Conversion Result Is Normal) ...................................... 262
13-20
Example of Connecting Capacitor to AV
13-21
Processing of AV
13-22
Internal Equivalent Circuit of ANI0 to ANI7 Pins .................................................................................. 264
13-23
Example of Connection if Signal Source Impedance Is High ............................................................... 264
14-1
Block Diagram of Serial Interface SIO3 ............................................................................................... 265
14-2
Format of Serial Operation Mode Register 3 (CSIM3) ......................................................................... 268
14-3
Timing of 3-Wire Serial I/O Mode ........................................................................................................ 272
15-1
Block Diagram of Serial Interface CSI1 ............................................................................................... 274
15-2
Format of Serial Operation Mode Register 1 (CSIM1) ......................................................................... 275
15-3
Format of Serial Clock Select Register 1 (CSIC1) ............................................................................... 276
15-4
Timing in 3-Wire Serial I/O Mode ......................................................................................................... 281
15-5
Timing of Clock/Data Phase ................................................................................................................ 283
15-6
Output Operation of First Bit ................................................................................................................ 284
15-7
Output Value of SO1 Pin (Last Bit) ....................................................................................................... 285
16-1
Block Diagram of Serial Interface UART0 ............................................................................................ 287
16-2
Baud Rate Generator Block Diagram .................................................................................................. 287
16-3
Format of Asynchronous Serial Interface Mode Register 0 (ASIM0) ................................................... 290
16-4
Format of Asynchronous Serial Interface Status Register 0 (ASIS0) .................................................. 291
16-5
Format of Baud Rate Generator Control Register 0 (BRGC0) ............................................................. 292
16-6
Baud Rate Error Tolerance (When k = 0), Including Sampling Errors .................................................. 300
16-7
Format of Transmit/Receive Data in Asynchronous Serial Interface .................................................... 301
16-8
Timing of Asynchronous Serial Interface Transmit Completion Interrupt Request ............................... 303
16-9
Timing of Asynchronous Serial Interface Receive Completion Interrupt Request ............................... 304
16-10
Receive Error Timing ........................................................................................................................... 305
17-1
Block Diagram of Serial Interface IIC0 ................................................................................................. 307
17-2
Serial Bus Configuration Example Using I
17-3
Format of IIC Control Register 0 (IICC0) ............................................................................................. 311
17-4
Format of IIC Status Register 0 (IICS0) ............................................................................................... 314
17-5
Format of IIC Transfer Clock Select Register 0 (IICCL0) ..................................................................... 317
17-6
Format of IIC Function Expansion Register 0 (IICX0) .......................................................................... 318
17-7
Pin Configuration Diagram ................................................................................................................... 319
2
17-8
I
C Bus Serial Data Transfer Timing .................................................................................................... 320
LIST OF FIGURES (5/8)
Pin .................................................................................... 263
DD
Pin ........................................................................................................................ 263
DD
2
C Bus ............................................................................... 308
User's Manual U15798EJ2V0UD
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