Table Of Contents - NEC mPD780344 Series User Manual

CHAPTER 1 OUTLINE ......................................................................................................................
1.1 Features ...................................................................................................................................
1.2 Applications ............................................................................................................................
1.3 Ordering Information ..............................................................................................................
1.4 Pin Configuration (Top View) ................................................................................................
1.5 78K/0 Series Lineup ................................................................................................................
1.6 Block Diagram .........................................................................................................................
1.7 Outline of Function .................................................................................................................
1.8 Mask Options ..........................................................................................................................
CHAPTER 2 PIN FUNCTIONS .........................................................................................................
2.1 Pin Function List .....................................................................................................................
2.2 Description of Pin Functions .................................................................................................
2.2.1 P00 to P07 (Port 0) .......................................................................................................................
2.2.2 P10 to P17 (Port 1) .......................................................................................................................
2.2.3 P20 to P27 (Port 2) .......................................................................................................................
2.2.4 P30 to P35 (Port 3) .......................................................................................................................
2.2.5 P40 to P43 (Port 4) .......................................................................................................................
2.2.6 P70 to P73 (Port 7) .......................................................................................................................
2.2.7 P80 to P87 (Port 8) .......................................................................................................................
2.2.8 P90 to P97 (Port 9) .......................................................................................................................
2.2.9 P100 to P107 (Port 10) .................................................................................................................
2.2.10 P110 to P113 (Port 11) ...............................................................................................................
2.2.11 AV ...........................................................................................................................................
DD
2.2.12 AV ............................................................................................................................................
SS
2.2.13 S0 to S39 ...................................................................................................................................
2.2.14 COM0 to COM3 ..........................................................................................................................
2.2.15 SCOM0 .......................................................................................................................................
2.2.16 V to V
LC0 LC2
2.2.17 CAPH and CAPL ........................................................................................................................
2.2.18 RESET .......................................................................................................................................
2.2.19 X1 and X2 ..................................................................................................................................
2.2.20 XT1 and XT2 ..............................................................................................................................
2.2.21 V and V
DD0
2.2.22 V and V
SS0
2.2.23 V (flash memory versions only) ...............................................................................................
PP
2.2.24 IC (mask ROM version only) ......................................................................................................
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins ......................................
CHAPTER 3 CPU ARCHITECTURE ................................................................................................
3.1 Memory Spaces ......................................................................................................................
3.1.1 Internal program memory space ..................................................................................................
3.1.2 Internal data memory space .........................................................................................................
3.1.3 Special function register (SFR) area ............................................................................................
3.1.4 Data memory addressing .............................................................................................................
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DD1
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SS1
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