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6.5 Operations of 16-Bit Timer/Event Counter 0
6.5.1 Interval timer operations
Setting 16-bit timer mode control register 0 (TMC0) and capture/compare control register 0 (CRC0) as shown in
Figure 6-7 allows operation as an interval timer. Interrupt requests are generated repeatedly using the count value
set in 16-bit timer capture/compare register 00 (CR00) beforehand as the interval.
When the count value of 16-bit timer counter 0 (TM0) matches the value set to CR00, counting continues with the
TM0 value cleared to 0 and the interrupt request signal (INTTM00) is generated.
The count clock of 16-bit timer/event counter 0 can be selected with bits 0 and 1 (PRM00, PRM01) of prescaler
mode register 0 (PRM0).
See 6.6 16-Bit Timer/Event Counter 0 Cautions (2) about the operation when the compare register value is
changed during timer count operation.
Figure 6-7. Control Register Settings for Interval Timer Operation
TMC0
0
0
0
CRC0
0
0
0
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with the interval timer. See Figure
6-3.
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
(a) 16-bit timer mode control register 0 (TMC0)
TMC03
TMC02
OVF0
0
1
1
0
0
(b) Capture/compare control register 0 (CRC0)
CRC02
CRC01
CRC00
0
0
0/1
0/1
0
User's Manual U15798EJ2V0UD
Clears and starts on match between TM0 and CR00.
CR00 used as compare register
137
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