Eip_In (Ethernet/Ip Input Refresh) - Panasonic FP7 Series Command Reference Manual

Cpu unit
Hide thumbs Also See for FP7 Series:
Table of Contents

Advertisement

17.37 EIP_IN (EtherNet/IP Input Refresh)

17.37 EIP_IN (EtherNet/IP Input Refresh)
Ladder diagram
(Note 1)
The above figure shows the case that S1=U100 (built-in ET-LAN in the CPU unit) and S2=U1
(connection number 1) are specified by the UNITSEL instruction.
List of operands
Operand
Description
S1
Specify the target node number of the input refresh.
S2
Specify the target connection number of the input refresh.
D
Specify the device address storing refresh results.
Devices that can be specified (indicated by ●)
Operan
d
W
W
X
Y
S1
S2
D
Processing
● Only when the connection that is to be refreshed receives new data, this instruction
refreshes data for the connection. "Input refresh" means that the data is copied from the
receive buffers to the allocated devices.
Precautions for programming
● Execute this instruction after the EtherNet/IP preparation done flag (X6B) turns ON. If the
instruction is executed before the flag turns ON, the EtherNet/IP communication preparation
incomplete error occurs.
● This instruction causes a processing load. Do not execute the instruction successively in one
scan.
● Before executing this instruction, use the cyclic communication normal node table to confirm
that the communication of the specified connection is performed normally. The cyclic
17-186
16-Bit device:
W
W
W
S
D
L
R
L
S
D
T
D
32-Bit
device:
TS
TE
U
W
WI
IX
C
C
M
O
S
E
Real
St
Integer
numbe
rin
r
g
D
K
H
SF
" "
F
WUME-FP7CPUPGR-12
Index
modifie
r

Advertisement

Table of Contents
loading

Table of Contents