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PLL Gain Change
Maximum Error
Accuracy Degradation
Supporting an
Embedded VXI PC:
Advanced Software Features
PLL Suppression Verification Process
PLL gain change is the amount in dB by which the theoretical gain of the
PLL must be adjusted to best match the smoothed measured loop
suppression. The parameters of the theoretical loop suppression that are
modified are Peak Tune Range (basically open loop gain) and Assumed Pole
(for example a pole on the VCO tune port that may cause peaking).
Maximum Error is the largest difference between the smoothed measured
loop suppression and the adjusted theoretical loop suppression in the
frequency range plotted for the smoothed measured loop suppression.
The frequency of the assumed pole is normally much greater than the Closed
PLL BW and there is no loop peaking. If the smoothed measured PLL
suppression shows peaking, the assumed pole is shifted down in frequency
to simulate the extra phase shift that caused the peaking. If the peaking is
really due to a single pole at a frequency near the Closed PLL BW, the
adjusted theoretical loop suppression and smoothed measured loop
suppression will show a good match and the maximum error will be small.
Accuracy spec. degradation is determined by taking the larger of Maximum
Error and magnitude of PLL Gain Change and then subtracting 1 dB.
A.01.04 also allows the use of an embedded VXI PC running WIN NT 4.0.
In this case, the VXI interface to the VXI assets will be "VXI direct" (select
within the Asset Manager Configuration). The VISA I/O libraries must also
support the embedded PC's GPIB card.
16-12 Agilent Technologies E5500 Phase Noise Measurement System
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