Pwm Output Operation - NEC mPD78F0730 Preliminary User's Manual

Count clock
TM5n count value
CR5n
TO5n
Note The initial value of TO5n output can be set by bits 2 and 3 (LVR5n, LVS5n) of 8-bit timer mode control
register 5n (TMC5n).

7.4.4 PWM output operation

8-bit timer/event counter 5n operates as a PWM output when bit 6 (TMC5n6) of 8-bit timer mode control register 5n
(TMC5n) is set to 1.
The duty pulse determined by the value set to 8-bit timer compare register 5n (CR5n) is output from TO5n.
Set the active level width of the PWM pulse to CR5n; the active level can be selected with bit 1 (TMC5n1) of
TMC5n.
The count clock can be selected with bits 0 to 2 (TCL5n0 to TCL5n2) of timer clock selection register 5n (TCL5n).
PWM output can be enabled/disabled with bit 0 (TOE5n) of TMC5n.
Caution In PWM mode, make the CR5n rewrite period 3 count clocks of the count clock (clock selected by
TCL5n) or more.
Remark n = 0, 1
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Figure 7-13. Square-Wave Output Operation Timing
t
00H 01H 02H
Count start
N
Note
Preliminary User's Manual U19014EJ1V0UD
N − 1
N 00H 01H 02H
N − 1
N 00H