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20.6.3 RESET pin
When connecting the reset signals of the dedicated flash writer to the RESET pin which is connected to
the reset signal generation circuit on-board, conflict of signals may happen. To avoid the conflict of sig-
nals, isolate the connection to the reset signal generation circuit.
When reset signal is input from the user system during the flash memory programming mode, program-
ming operation will not be performed correctly. Therefore, do not input signals other than the reset sig-
nals from the dedicated flash writer.
Figure 20-7: Conflict between Flash Writer Reset Line and Reset Signal Generation Circuit
µPD70F3123
RESET
20.6.4 NMI pin
Do not change the input signal to the NMI pin during the flash memory programming mode. If the NMI
pin is changed during the flash memory programming mode, the programming may not be performed
correctly.
20.6.5 MODE pin
To switch to the flash memory programming mode, change MODE0 through MODE2 accordingly with
jumpers, etc., apply writing voltage to V
20.6.6 Port pins
When the flash memory programming mode is set, all the port pins except the pins which communicate
with the dedicated flash writer become high-impedance status. The treatment of these port pins is not
necessary.
20.6.7 Other signal pins
Connect X1, X2, CKSEL, CLOCKIN, IC, VCMPIN, VCMPOUT, and AV
the normal operation mode.
20.6.8 Power supply
Provide the same power supply (V
AV
, CV
, CV
) as that in normal operation mode.
SS
DD
SS
578
Chapter 20 Flash Memory (µPD70F3123)
Conflict of signals
In the flash memory programming mode, the signal that the
reset signal generation circuit outputs conflicts with the signal
that the flash writer outputs. Therefore, isolate the signals
on the reset signal generation circuit side.
/V
pins, and release the reset.
PP0
PP1
to V
, V
DD50
DD54
SS5
Preliminary User's Manual U14913EE1V0UM00
Flash writer
RESET output pin
Reset signal generation circuit
Output pin
REF
to V
, V
to V
SS54
DD30
to the same status as that in
, V
to V
, AV
DD33
SS30
SS33
,
DD
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