NEC V850E/CA1 ATOMIC Preliminary User's Manual page 412

32-/16-bit single-chip microcontroller
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Figure 13-23: CAN 1 to 3 Interrupt Pending Registers (C1INTP to C3INTP) (2/2)
Read (2/2)
Bit Name
Bit Position
Note
1
CxINT1
0
CxINT0
Write
Bit Position
Bit Name
Note
6
CL_CxINT6 Clears the interrupt pending bit CxINT6.
5
CL_CxINT5 Clears the interrupt pending bit CxINT5.
4
CL_CxINT4 Clears the interrupt pending bit CxINT4.
3
CL_CxINT3 Clears the interrupt pending bit CxINT3.
2
CL_CxINT2 Clears the interrupt pending bit CxINT2.
1
CL_CxINT1 Clears the interrupt pending bit CxINT1.
0
CL_CxINT0 Clears the interrupt pending bit CxINT0.
Note: x = 1 to 3
Remarks: 1. The interrupts CxINT1 to CxINT6 are only generated when the corresponding interrupt
enable bit in the CGIE register is set.
2. The interrupt pending bits must be cleared by software in the interrupt service routine.
Caution: In case the interrupt pending bit is not cleared by software in the interrupt service
routine, no subsequent interrupt is generated anymore.
412
Chapter 13 FCAN Interface Function
Indicates a reception completion interrupt of CAN module x.
0: No Interrupt pending
1: Interrupt pending
Indicates a transmission completion interrupt of CAN module x.
0: No Interrupt pending
1: Interrupt pending
0: No change of CxINT6 bit.
1: CxINT6 bit is cleared (0).
0: No change of CxINT5 bit.
1: CxINT5 bit is cleared (0).
0: No change of CxINT4 bit.
1: CxINT4 bit is cleared (0).
0: No change of CxINT3 bit.
1: CxINT3 bit is cleared (0).
0: No change of CxINT2 bit.
1: CxINT2 bit is cleared (0).
0: No change of CxINT1 bit.
1: CxINT1 bit is cleared (0).
0: No change of CxINT0 bit.
1: CxINT0 bit is cleared (0).
Preliminary User's Manual U14913EE1V0UM00
Function
Function

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